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Modular exponentiation using the Artix-7 FPGA
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2017-08-11
Work in progress.
Pavel V. Shatov (Meister)
2017-08-06
* Moved systolic processing element array into a separate module.
Pavel V. Shatov (Meister)
2017-07-25
Wide operand loader needs simplification...
Pavel V. Shatov (Meister)
2017-07-25
Trying to fix the bug during calculation of SN in systolic multiplier.
Pavel V. Shatov (Meister)
2017-07-19
Added pre-multiplication step.
Pavel V. Shatov (Meister)
2017-07-19
Finished modular exponentiation module:
Pavel V. Shatov (Meister)
2017-07-18
Started adding exponentiator module w/ testbench.
Pavel V. Shatov (Meister)
2017-07-13
Systolic multiplier simplified a bit:
Pavel V. Shatov (Meister)
2017-07-10
* made separate file for low-level settings
Pavel V. Shatov (Meister)
2017-07-01
Added generic/vendor-specific primitive selector for simulation.
Pavel V. Shatov (Meister)
2017-07-01
Added 512-bit test vector
Pavel V. Shatov (Meister)
2017-07-01
Finished modulus-dependent coefficient calculation module:
Pavel V. Shatov (Meister)
2017-06-27
Added test vectors, use scripts from the C model to (re-)generate them.
Pavel V. Shatov (Meister)
2017-06-27
Added Montgomery modulus-dependent coefficient calculation block
Pavel V. Shatov (Meister)
2017-06-27
Added Montgomery factor calculation block
Pavel V. Shatov (Meister)
2017-06-27
Added systolic modular multiplier w/ testbench.
Pavel V. Shatov (Meister)
2017-06-27
Start conversion to systolic architecture.
Pavel V. Shatov (Meister)
2016-06-14
Initial commit
Paul Selkirk