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AgeCommit message (Expand)Author
2018-04-27Removed FSM and cleaned up code in W mem. Cleaned up testbenches to silence w...Joachim Strömbergson
2016-05-31Adding functionality to support both SHA224 and SHA256 digest modes. Note: Th...Joachim Strömbergson
2016-05-31Fixed long constants and instead rely on zero extend in Verilog.Joachim Strömbergson
2015-12-13whack copyrightsPaul Selkirk
2015-07-17Fixed state restore testcase in core testbench. Fixed the double block test c...Joachim Strömbergson
2015-07-17Minor cleanup.Joachim Strömbergson
2015-07-17Removed the address defines not needed.Joachim Strömbergson
2015-07-17Since state is digest having separate addresses for writing state is superflo...Joachim Strömbergson
2015-07-17Added top level test case for restore state and continue hashing. Test OK.Joachim Strömbergson
2015-07-16Adding a task to dump the H state.Joachim Strömbergson
2015-07-16Adding test case for state restore.Joachim Strömbergson
2015-07-16Added logic to write state into the state registers. Simplified the state wri...Joachim Strömbergson
2015-07-16The digest is the complete state so we only need to be able to write back sta...Joachim Strömbergson
2015-07-16(1) Adding addresses to be able to read and write the internal hash state fro...Joachim Strömbergson
2015-03-31Remove wishbone testbench code, because we no longer have the verilog.Paul Selkirk
2015-03-31Revert streamlined wrapper, and don't delay register reads.Paul Selkirk
2015-03-17Rearrange cores.Paul Selkirk
2015-03-11Removed the wishbone wrapper we don't use.Joachim Strömbergson
2014-11-07Changed to asynch reset.Joachim Strömbergson
2014-11-06Fixed nits found using verilator linter. Removed trailing whitespace.Joachim Strömbergson
2014-05-16Adding helper functions for printing digest. Adding testcase for message with...Joachim Strömbergson
2014-04-01Updating sha256 python model with NIST dual block test case and test case wit...Joachim Strömbergson
2014-03-17Removed redundant flag reset wires.Joachim Strömbergson
2014-03-16Adding self resetting init and next flags. Updating TBs to not reset the flag...Joachim Strömbergson
2014-03-15(1) Updated interface to new std. (2) Added missing input designation in task...Joachim Strömbergson
2014-02-26Removed the positions of W no longer needed.Joachim Strömbergson
2014-02-26Changed the python model to use a sliding window for W.Joachim Strömbergson
2014-02-23Fixed compile problems due to copy crime.Joachim Strömbergson
2014-02-23Moved wmem update logic to a separate process.Joachim Strömbergson
2014-02-22Updated testbenches to the new sliding window W-mem.Joachim Strömbergson
2014-02-22Changed W-memory into sliding window. This also affected interface and integr...Joachim Strömbergson
2014-02-19Adding a Python model for the SHA256 core.Joachim Strömbergson
2014-02-19Adding a testbench for the Wishbone wrapper.Joachim Strömbergson
2014-02-19Adding a testbench for the SHA256 top level wrapper.Joachim Strömbergson
2014-02-19Adding a testbench for the SHA256 core.Joachim Strömbergson
2014-02-19Adding a testbench for the w memory module.Joachim Strömbergson
2014-02-19Adding a Wishbone wrapper for the SHA256 core.Joachim Strömbergson
2014-02-19Adding top level wrapper for the sha256. This wrapper provides a simple memor...Joachim Strömbergson
2014-02-19Source for the main part of the sha256 core.Joachim Strömbergson
2014-02-19Adding the W memory including scheduler and expansion functionality.Joachim Strömbergson
2014-02-19Adding K constant memory source file.Joachim Strömbergson