| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | Makefile | 870 | logplainblame |
| -rw-r--r-- | README.md | 1308 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_curve.h | 8887 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_curve_abstract.cpp | 13132 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_curve_microcode.cpp | 17209 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_lowlevel.cpp | 4601 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_lowlevel.h | 3568 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_microcode.cpp | 15710 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_microcode.h | 5256 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_model.cpp | 18650 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_model.h | 6391 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_modular.cpp | 30388 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_modular.h | 5921 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_multiword.cpp | 4089 | logplainblame |
| -rw-r--r-- | ecdsa_fpga_multiword.h | 3556 | logplainblame |
| -rw-r--r-- | ecdsa_microcode_parser.py | 29525 | logplainblame |
| d--------- | test_vectors | 372 | logplain |
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index : user/shatov/ecdsa_fpga_model | |
| Reference model written to help debug Verilog code | git repositories |
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