Age | Commit message (Expand) | Author |
2019-04-09 | Adding inital tb for the SPI slave. Debugging the SPI slave and the FPGA_MKM. | Joachim Strömbergson |
2019-03-26 | (1) Changing key memory to be based on bytes. (2) Adding API commands ands st... | Joachim Strömbergson |
2019-03-26 | Completed first RTL for the SPI slave. Simplified the design to simply be two... | Joachim Strömbergson |
2019-03-12 | Adding registers, control signals and logic for receiving and transmitting bits. | Joachim Strömbergson |
2019-03-10 | Adding bit counters for rx and tx. Since they will be updated the same we sho... | Joachim Strömbergson |
2019-03-07 | Adding initial version of SPI slave interface. So far just defined ports and ... | Joachim Strömbergson |
2019-02-12 | Starting to add control registers and control FSM needed for the key handling... | Joachim Strömbergson |
2019-02-12 | Adding initial version of real testbench for the fpga_mkm. | Joachim Strömbergson |
2019-02-12 | (1) Mapped all accessible IOs on the iCEstick and allocated ports on the PMOD... | Joachim Strömbergson |
2019-02-12 | (1) Fixed Makefile. Now we can build sim target, generate bitstream and also ... | Joachim Strömbergson |
2019-02-11 | Fixed Makefile to allow building of simulation executable, linting and FPGA b... | Joachim Strömbergson |
2019-02-11 | Adding initial version of top. | Joachim Strömbergson |
2019-02-11 | Adding pinmap for the iCEstick. | Joachim Strömbergson |