Adding bit counters for rx and tx. Since they will be updated the same we should have a single counter though. Created rx shift register.

2 files changed, 67 insertions, 9 deletions

diff --git a/src/rtl/fpga_mkm.v b/src/rtl/fpga_mkm.v
index 6dee64a..eb6172d 100644
--- a/src/rtl/fpga_mkm.v
+++ b/src/rtl/fpga_mkm.v
@@ -102,18 +102,26 @@ module fpga_mkm(
   //----------------------------------------------------------------
   // reg_update
   //----------------------------------------------------------------
-  always @ (posedge clk)
+  always @ (posedge clk or negedge tamper)
     begin : reg_update
-      alarm_counter_reg <= alarm_counter_reg + 1;
+      if (!tamper)
+        begin
+          // Zeroise the key material!
 
-      if (alarm_we)
-        alarm_reg <= alarm_new;
+        end
+      else
+        begin
+          alarm_counter_reg <= alarm_counter_reg + 1;
 
-      if (key_loaded_we)
-        key_loaded_reg <= key_loaded_new;
+          if (alarm_we)
+            alarm_reg <= alarm_new;
 
-      if (fpga_mkm_ctrl_we)
-        fpga_mkm_ctrl_reg <= fpga_mkm_ctrl_new;
+          if (key_loaded_we)
+            key_loaded_reg <= key_loaded_new;
+
+          if (fpga_mkm_ctrl_we)
+            fpga_mkm_ctrl_reg <= fpga_mkm_ctrl_new;
+        end
     end
 
 
diff --git a/src/rtl/fpga_mkm_spi_slave.v b/src/rtl/fpga_mkm_spi_slave.v
index 92eb510..7838b23 100644
--- a/src/rtl/fpga_mkm_spi_slave.v
+++ b/src/rtl/fpga_mkm_spi_slave.v
@@ -141,7 +141,7 @@ module fpga_mkm_spi_slave(
       mosi_reg         <= mosi_sample1_reg;
 
       if (rx_byte_we)
-        rx_byte_reg <= rx_byte_new;
+        rx_byte_reg <= {rx_byte_reg[], mosi_reg};
 
       if (rx_bit_ctr_we)
         rx_bit_ctr_reg <= rx_bit_ctr_new;
@@ -158,10 +158,60 @@ module fpga_mkm_spi_slave(
 
 
   //----------------------------------------------------------------
+  // rx_bit_ctr
+  //----------------------------------------------------------------
+  always @*
+    begin : rx_bit_ctr
+      rx_bit_ctr_new = 3'h0;
+      rx_bit_ctr_we  = 1'h0;
+
+      if (rx_bit_ctr_rst)
+        begin
+          rx_bit_ctr_new = 3'h0;
+          rx_bit_ctr_we  = 1'h1;
+        end
+
+      if (rx_bit_ctr_inc)
+        begin
+          rx_bit_ctr_new = rx_bit_ctr_reg + 1'h1;
+          rx_bit_ctr_we  = 1'h0;
+        end
+    end
+
+
+  //----------------------------------------------------------------
+  // tx_bit_ctr
+  //----------------------------------------------------------------
+  always @*
+    begin : tx_bit_ctr
+      tx_bit_ctr_new = 3'h0;
+      tx_bit_ctr_we  = 1'h0;
+
+      if (tx_bit_ctr_rst)
+        begin
+          tx_bit_ctr_new = 3'h0;
+          tx_bit_ctr_we  = 1'h1;
+        end
+
+      if (tx_bit_ctr_inc)
+        begin
+          tx_bit_ctr_new = tx_bit_ctr_reg + 1'h1;
+          tx_bit_ctr_we  = 1'h0;
+        end
+    end
+
+
+  //----------------------------------------------------------------
   // spi_slave_ctrl_fsm
   //----------------------------------------------------------------
   always @*
     begin : spi_slave_ctrl_fsm
+      rx_bit_ctr_rst = 1'h0;
+      rx_bit_ctr_inc = 1'h0;
+      tx_bit_ctr_rst = 1'h0;
+      tx_bit_ctr_inc = 1'h0;
+      rx_byte_we     = 1'h0;
+
     end
 
 endmodule // fpga_mkm_spi_slave