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masterUpdated README with development status.Joachim Strömbergson3 years
 
 
AgeCommit messageAuthor
2019-04-26Updated README with development status.HEADmasterJoachim Strömbergson
2019-04-09Adding inital tb for the SPI slave. Debugging the SPI slave and the FPGA_MKM.Joachim Strömbergson
2019-03-26(1) Changing key memory to be based on bytes. (2) Adding API commands ands st...Joachim Strömbergson
2019-03-26Completed first RTL for the SPI slave. Simplified the design to simply be two...Joachim Strömbergson
2019-03-12Adding registers, control signals and logic for receiving and transmitting bits.Joachim Strömbergson
2019-03-10Adding bit counters for rx and tx. Since they will be updated the same we sho...Joachim Strömbergson
2019-03-07Adding initial version of SPI slave interface. So far just defined ports and ...Joachim Strömbergson
2019-02-12Starting to add control registers and control FSM needed for the key handling...Joachim Strömbergson
2019-02-12Adding initial version of real testbench for the fpga_mkm.Joachim Strömbergson
2019-02-12(1) Mapped all accessible IOs on the iCEstick and allocated ports on the PMOD...Joachim Strömbergson
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