user/shatov/ecdsa_fpga_model - Reference model written to help debug Verilog code

Branch	Commit message	Author	Age
fix	Don't override curve if it was selected externally.	Pavel V. Shatov (Meister)	7 years
master	Cosmetic fix.	Pavel V. Shatov (Meister)	3 years


Age	Commit message	Author
2021-07-19	Cosmetic fix.HEAD master	Pavel V. Shatov (Meister)
2021-07-19	Fixed copyright notices.	Pavel V. Shatov (Meister)
2021-04-12	* cleaned up a bit	Pavel V. Shatov (Meister)
2021-04-11	Updated microcode parser script.	Pavel V. Shatov (Meister)
2021-04-11	Updated the top layer to accomodate changes in the underlying architecture.	Pavel V. Shatov (Meister)
2021-04-11	Updated curve math layer to do multiplication using the Montgomery ladder	Pavel V. Shatov (Meister)
2021-04-11	Forgot to add copyright year	Pavel V. Shatov (Meister)
2021-04-11	* Microcode layer redesigned to take advantage of Montgomery ladder	Pavel V. Shatov (Meister)
2021-04-11	Added debugging helper flag to dump outputs of modular operations.	Pavel V. Shatov (Meister)
2021-03-13	Fixed non-microcoded mode compile error	Pavel V. Shatov (Meister)
[...]

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