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| author | Joachim StroĢmbergson <joachim@assured.se> | 2019-02-12 10:41:53 +0100 |
|---|---|---|
| committer | Joachim StroĢmbergson <joachim@assured.se> | 2019-02-12 10:41:53 +0100 |
| commit | ea442d768cba08d3728ea2e7e62f1d90e0e781fd (patch) | |
| tree | d2d03acf772b95b800115daca65fc3f245f82af3 /src/tb | |
| parent | 681c311e98b704b383bdca67f569a206fad551a0 (diff) | |
(1) Fixed Makefile. Now we can build sim target, generate bitstream and also burn it to the FPGA dev board. (2) Started structuring the RTL source file.
Diffstat (limited to 'src/tb')
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