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| author | Fredrik Thulin <fredrik@thulin.net> | 2016-05-18 21:14:52 +0200 |
|---|---|---|
| committer | Fredrik Thulin <fredrik@thulin.net> | 2016-05-18 21:14:52 +0200 |
| commit | 523d1f66453e9b92835ecc661085e4575426e661 (patch) | |
| tree | 008ff6e22deeecbcb6fc9571db1fd7ecce306ea1 /stm-fpgacfg.h | |
| parent | 5e32bc524c4987cfe33cccdb544e3f8d66802895 (diff) | |
Add FPGA bitstream upload command to cli-test.
This code needs more error checking etc. but together with the Python
script 'filetransfer', a new bitstream may be loaded into the FPGA
config memory like this:
filetransfer --fpga /path/to/bitstream
The bitstream is identified by 'file' e.g. like this:
alpha_test_top.bit: Xilinx BIT data - from
alpha_test_top.ncd;UserID=0xFFFFFFFF - for 7a200tfbg484 - built
2016/05/12(13:59:24) - data length 0xe0164
Diffstat (limited to 'stm-fpgacfg.h')
| -rw-r--r-- | stm-fpgacfg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/stm-fpgacfg.h b/stm-fpgacfg.h index bed3b38..fa5c4ef 100644 --- a/stm-fpgacfg.h +++ b/stm-fpgacfg.h @@ -75,6 +75,9 @@ extern int n25q128_read_page(uint32_t page_offset, uint8_t *page_buffer); extern int n25q128_write_page(uint32_t page_offset, uint8_t *page_buffer); extern int n25q128_erase_sector(uint32_t sector_offset); +extern void fpgacfg_give_access_to_stm32(void); +extern void fpgacfg_give_access_to_fpga(void); + extern SPI_HandleTypeDef hspi_fpgacfg; #endif /* __STM32_FPGACFG_H */ |