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| author | Paul Selkirk <paul@psgd.org> | 2020-03-31 09:27:02 -0400 |
|---|---|---|
| committer | Paul Selkirk <paul@psgd.org> | 2020-03-31 09:27:28 -0400 |
| commit | 2aee357d677e720215f5a03cf071ee94980cf05d (patch) | |
| tree | 0fbf83ad000d9b98ba556629f894d2a5a2b62d67 /src/tech | |
| parent | 4333178c6a8f467ddacc13ddae0bed588b6bdcf3 (diff) | |
| parent | 0d2aa16a71c1f0ca183a71c3d5460c6ff1a2f245 (diff) | |
Merge branch 'integrate_mkmif' to master
Diffstat (limited to 'src/tech')
| -rw-r--r-- | src/tech/README.md | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/tech/README.md b/src/tech/README.md new file mode 100644 index 0000000..0e04542 --- /dev/null +++ b/src/tech/README.md @@ -0,0 +1,14 @@ +README.md +========= +This dir is where the vendor specific Verilog memory model should be +stored. + +The memory used is the [Microchip +23K640](https://www.microchip.com/wwwproducts/en/23A640) a 64kbit, +SPI-connected serial SRAM. + +The Verilog memory model can be downloaded from that webpage or [by +clicking on this link](http://ww1.microchip.com/downloads/en/DeviceDoc/23x640_Verilog_Model.zip). + +Download and unzip the file in this directory. This should produce two +files, 23A640.v and 23K640.v. The one needed for simulation is 23K640.v |