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diff --git a/src/tech/README.md b/src/tech/README.md new file mode 100644 index 0000000..0e04542 --- /dev/null +++ b/src/tech/README.md @@ -0,0 +1,14 @@ +README.md +========= +This dir is where the vendor specific Verilog memory model should be +stored. + +The memory used is the [Microchip +23K640](https://www.microchip.com/wwwproducts/en/23A640) a 64kbit, +SPI-connected serial SRAM. + +The Verilog memory model can be downloaded from that webpage or [by +clicking on this link](http://ww1.microchip.com/downloads/en/DeviceDoc/23x640_Verilog_Model.zip). + +Download and unzip the file in this directory. This should produce two +files, 23A640.v and 23K640.v. The one needed for simulation is 23K640.v |