diff options
author | Paul Selkirk <pselkirk@isc.org> | 2015-03-17 13:49:37 +0100 |
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committer | Paul Selkirk <pselkirk@isc.org> | 2015-03-17 13:49:37 +0100 |
commit | 3c36fb89e99931bc8134f072b4bca7ca526ab513 (patch) | |
tree | ff4a817ca696639022bb622b9b65274226722025 /README.md | |
parent | e61ac3e6db2b8e8f162f75213038130209107328 (diff) |
Rearrange cores.
Diffstat (limited to 'README.md')
-rw-r--r-- | README.md | 17 |
1 files changed, 8 insertions, 9 deletions
@@ -1,14 +1,16 @@ -coretest_hashes -=============== +platform/terasic_c5g +==================== -The coretest system combined with cryptographic hash functions. +Platform-specific files for the TerasIC C5G development board. ## Introduction ## -This is a HW subsystem that includes the coretest module connected to a -uart for external access and to hash function cores. The first version -includes the SHA-1 and SHA-256 cores. +This includes the Verilog top-level files and build systems for Terasic +with a UART interface. ## Status ## +***(2015-03-16)*** +Reorganized. Built using Altera Quarus 14.1. + ***(2014-03-07)*** Initial version. Build using Altera Quarus 13.1. @@ -16,6 +18,3 @@ Initial version. Build using Altera Quarus 13.1. - 2847 ALMs and - 3665 registers - 86 MHz - - - |