core/platform/terasic_c5g - Platform-specific files for the TerasIC C5G development board

Branch	Commit message	Author	Age
master	whack copyrights	Paul Selkirk	8 years


Age	Commit message	Author
2015-12-13	whack copyrightsHEAD master	Paul Selkirk
2015-03-17	Rearrange cores.	Paul Selkirk
2014-05-16	Increased communication speed. Increased number of blocks in huge mesage test...	Joachim Strömbergson
2014-05-16	Fixed huge message test. We now run test of message with 100 blocks in SHA-256.	Joachim Strömbergson
2014-05-09	Enabling all test cases again.	Joachim Strömbergson
2014-05-09	Adding new prebuilt FPGA with uart that supports change of bitrate.	Joachim Strömbergson
2014-05-09	Added functionality to change baud rate. Decreased comm delay. Now test cases...	Joachim Strömbergson
2014-05-08	Fixed error in (c). Drastically reduced processing delay. Adding missing expe...	Joachim Strömbergson
2014-05-08	Adding test case for dual block tests of SHA-512/x. All tests passed. Separat...	Joachim Strömbergson
2014-05-08	(1) Added functionality to do single block tests of all SHA-512/x modes. (2) ...	Joachim Strömbergson
[...]

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