aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2017-01-17Track changes to the core_selector generator.HEADmastercore_config_cleanupPaul Selkirk
2015-12-14add makefile 'distclean' target to remove generated core selectorPaul Selkirk
2015-12-13whack copyrightsPaul Selkirk
2015-11-18Move core_selector config script to core/platform/common, generate ↵Paul Selkirk
project-specific core_selectors in the build directories.
2015-11-18Move novena_clkmgr IBUFGDS to clkmgr_dcm, to put the Xilinx-specific ↵Paul Selkirk
primitives in one place.
2015-11-16new constraint file for building for EIM with a dev-bridge board in placePaul Selkirk
2015-11-15fix top_module name for fmc buildPaul Selkirk
2015-11-14Catch up with other branch merges.Paul Selkirk
- All cores use active-low reset now. - TRNG cores are contiguous (but they still have their own mux, so occupy a block of 16 cores). - Use modexps6 instead of modexp.
2015-11-13Merge branch 'config_core_selector'Paul Selkirk
2015-11-12Merge branch 'modexps6'Paul Selkirk
2015-11-12Change reset to active-low.Paul Selkirk
2015-11-12Merge branch 'activelow'Paul Selkirk
2015-11-02Committing once again to 'activelow' branch...Pavel V. Shatov
2015-10-29add fmcPaul Selkirk
2015-10-19integrate Pavel's new clkmgr codePaul Selkirk
2015-10-19catch up to changes in core version numbersPaul Selkirk
2015-09-29Attempting to optimize out the one-cycle delay didn't work, relativelyRob Austein
low priority, so just disable the optimization for now.
2015-09-29Add support for error_wire and block_memory options.Rob Austein
2015-09-29Sick hacks to compensate for sparse MUX within TRNG core.Rob Austein
2015-09-28Comment update.Rob Austein
2015-09-28ModExpS6 has no error output.Rob Austein
2015-09-28RawConfigParser doesn't support super().Rob Austein
2015-09-28Handle reset high/low logic in the config file. Connect error signals.Rob Austein
2015-09-28ModExpS6 top is called modexps6_wrapper, not modexps6, sigh.Rob Austein
2015-09-27Comments.Rob Austein
2015-09-27Add "requires" option.Rob Austein
2015-09-27Wedge modexps6 into the addressing scheme. Adjust timing of otherRob Austein
cores. Tweak TRNG templates to support multiple instances, more for consistency than than because we really expect multiple TRNGs.
2015-09-27Comments noting the strange history of the addressing scheme.Rob Austein
2015-09-26Sorted out reset pins (I think). Seems our various core authors haveRob Austein
different opinions about whether reset should be high or low, and the core selector code is responsible for making this right. Hmm. Address map may still be wrong, as addressing scheme seems to have changed while the core_select branch was gathering dust.
2015-09-25Previous commit was incomplete.Rob Austein
2015-09-25Minor cleanup.Rob Austein
2015-09-25Incomplete attempt to track changes to core_selector architecture.Rob Austein
The board_regs and comm_regs cores handle reset differently, but there's also this sys_ena wire which appeared out of the ether one day and is not yet in this movie. This version does NOT synthesize (nor did the previous ones, but now we know it...).
2015-09-25Track filename changes to modexp core that took place ages ago.Rob Austein
2015-09-25Configure makefile vfiles list too.Rob Austein
2015-09-24Git rid of commas in config language, add some comments.Rob Austein
2015-09-24Convert to something a bit more object-oriented, to simplify addingRob Austein
additional methods for things like .h and .mk files.
2015-09-23MODEXPS6_ADDR_BASE goes away under the new scheme.Rob Austein
2015-09-23Trailing whitespace cleanup.Rob Austein
2015-09-23Merge branch 'modexps6' into config_core_selector_sraRob Austein
2015-07-18update lint for new ipcore modulesPaul Selkirk
2015-07-17remove .xco files from buildPaul Selkirk
2015-07-17remove all non-essential files related to clkmgr_dcmPaul Selkirk
2015-07-17move new modexps6 core from test to corePaul Selkirk
2015-07-17experimental modexps6 (which requires changing the read timing on all other ↵Paul Selkirk
cores)
2015-06-26Track filename changes in ModExp core.Rob Austein
2015-06-23add tools to configure and start an FPGA bitstreamPaul Selkirk
2015-06-18use a variable for AR, to facilitate cross-compilingPaul Selkirk
2015-06-18build all cores with i2cPaul Selkirk
2015-06-18add support for verilator lintingPaul Selkirk
2015-06-10generate core_selector, probe FPGA for cores at software startupPaul Selkirk