diff options
author | Paul Selkirk <paul@psgd.org> | 2015-11-12 16:48:01 -0500 |
---|---|---|
committer | Paul Selkirk <paul@psgd.org> | 2015-11-12 16:48:01 -0500 |
commit | 2b374d2b124d073e37708843cf599256b2cd9aa1 (patch) | |
tree | d3513a5a435f550e3ec2b46587c4a9be43b9c87c | |
parent | 4cfd0c3dbe688960f6b7e7285b7a14cebb1586a3 (diff) |
Change reset to active-low.
-rw-r--r-- | common/rtl/novena_regs.v | 6 | ||||
-rw-r--r-- | eim/rtl/novena_eim.v | 8 | ||||
-rw-r--r-- | fmc/rtl/novena_fmc_top.v | 8 | ||||
-rw-r--r-- | i2c/rtl/novena_i2c.v | 11 |
4 files changed, 16 insertions, 17 deletions
diff --git a/common/rtl/novena_regs.v b/common/rtl/novena_regs.v index eb89092..4edf028 100644 --- a/common/rtl/novena_regs.v +++ b/common/rtl/novena_regs.v @@ -42,7 +42,7 @@ module board_regs ( // Clock and reset. input wire clk, - input wire rst, + input wire reset_n, // Control. input wire cs, @@ -96,9 +96,9 @@ module board_regs //---------------------------------------------------------------- // storage registers for mapping memory to core interface //---------------------------------------------------------------- - always @ (posedge clk or posedge rst) + always @ (posedge clk or negedge reset_n) begin - if (rst) + if (!reset_n) begin reg_dummy <= {32{1'b0}}; end diff --git a/eim/rtl/novena_eim.v b/eim/rtl/novena_eim.v index 2de6cba..a8aee9b 100644 --- a/eim/rtl/novena_eim.v +++ b/eim/rtl/novena_eim.v @@ -75,7 +75,7 @@ module novena_top // and implement the reset logic. // ---------------------------------------------------------------- wire sys_clk; - wire sys_rst; + wire sys_rst_n; wire eim_bclk_buf; novena_clkmgr # @@ -91,7 +91,7 @@ module novena_top .reset_mcu_b (reset_mcu_b_pin), .sys_clk (sys_clk), - .sys_rst (sys_rst) + .sys_rst_n (sys_rst_n) ); @@ -128,7 +128,7 @@ module novena_top .eim_wait_n(eim_wait_n), .sys_clk(sys_clk), - .sys_rst(sys_rst), + .sys_rst_n(sys_rst_n), .sys_eim_addr(sys_eim_addr), .sys_eim_wr(sys_eim_wr), @@ -159,7 +159,7 @@ module novena_top core_selector cores ( .sys_clk(sys_clk), - .sys_rst(sys_rst), + .sys_rst_n(sys_rst_n), .sys_eim_addr(sys_eim_addr), .sys_eim_wr(sys_eim_wr), diff --git a/fmc/rtl/novena_fmc_top.v b/fmc/rtl/novena_fmc_top.v index 75c6f6d..37fdc49 100644 --- a/fmc/rtl/novena_fmc_top.v +++ b/fmc/rtl/novena_fmc_top.v @@ -71,7 +71,7 @@ module novena_fmc_top // and implement the reset logic. // ---------------------------------------------------------------- wire sys_clk; - wire sys_rst; + wire sys_rst_n; novena_clkmgr # ( @@ -86,7 +86,7 @@ module novena_fmc_top .reset_mcu_b (reset_mcu_b_pin), .sys_clk (sys_clk), - .sys_rst (sys_rst) + .sys_rst_n (sys_rst_n) ); @@ -154,7 +154,7 @@ module novena_fmc_top fmc_indicator led ( .sys_clk(sys_clk), - .sys_rst(sys_rst), + .sys_rst_n(sys_rst_n), .fmc_active(sys_fmc_wren | sys_fmc_rden), .led_out(led_pin) ); @@ -220,7 +220,7 @@ module novena_fmc_top core_selector cores ( .sys_clk(sys_clk), - .sys_rst(sys_rst), + .sys_rst_n(sys_rst_n), .sys_eim_addr(sys_fmc_addr[16:0]), // XXX parameterize .sys_eim_wr(sys_fmc_wren), diff --git a/i2c/rtl/novena_i2c.v b/i2c/rtl/novena_i2c.v index c70f691..4ea6f82 100644 --- a/i2c/rtl/novena_i2c.v +++ b/i2c/rtl/novena_i2c.v @@ -67,7 +67,7 @@ module novena_top // and implement the reset logic. // ---------------------------------------------------------------- wire sys_clk; - wire sys_rst; + wire sys_rst_n; novena_clkmgr # ( @@ -82,7 +82,7 @@ module novena_top .reset_mcu_b(reset_mcu_b_pin), .sys_clk(sys_clk), - .sys_rst(sys_rst) + .sys_rst_n(sys_rst_n) ); @@ -101,7 +101,6 @@ module novena_top wire sda_int; wire clk = sys_clk; - wire reset_n = ~sys_rst; // Coretest connections. wire coretest_reset_n; @@ -132,7 +131,7 @@ module novena_top i2c_core i2c_core ( .clk(clk), - .reset(sys_rst), + .reset(~sys_rst_n), // active-high reset for this third-party module // External data interface .SCL(i2c_scl), @@ -154,7 +153,7 @@ module novena_top coretest coretest ( .clk(clk), - .reset_n(reset_n), + .reset_n(sys_rst_n), .rx_syn(i2c_rxd_syn), .rx_data(i2c_rxd_data), @@ -189,7 +188,7 @@ module novena_top core_selector cores ( .sys_clk(clk), - .sys_rst(sys_rst), + .sys_rst_n(sys_rst_n), .sys_eim_addr(sys_eim_addr), .sys_eim_wr(sys_eim_wr), |