diff options
Diffstat (limited to 'core_selector/src/rtl/hash_selector.v')
| -rw-r--r-- | core_selector/src/rtl/hash_selector.v | 59 |
1 files changed, 41 insertions, 18 deletions
diff --git a/core_selector/src/rtl/hash_selector.v b/core_selector/src/rtl/hash_selector.v index 66806b6..ad6793e 100644 --- a/core_selector/src/rtl/hash_selector.v +++ b/core_selector/src/rtl/hash_selector.v @@ -49,7 +49,8 @@ module hash_selector input wire sys_eim_wr, input wire sys_eim_rd, output wire [31 : 0] sys_read_data, - input wire [31 : 0] sys_write_data + input wire [31 : 0] sys_write_data, + output wire sys_error ); /* In this memory segment (HASHES) we have 14 address bits. Every core has @@ -114,17 +115,16 @@ XXX move to `define in wrapper core?? //---------------------------------------------------------------- // Address Decoder //---------------------------------------------------------------- - wire [ 5: 0] addr_core_num = sys_eim_addr[13: 8]; // upper 6 bits specify core being addressed - wire [ 7: 0] addr_core_reg = sys_eim_addr[ 7: 0]; // lower 8 bits specify register offset in core + // upper 6 bits specify core being addressed + wire [ 5: 0] addr_core_num = sys_eim_addr[13: 8]; + // lower 8 bits specify register offset in core + wire [ 7: 0] addr_core_reg = sys_eim_addr[ 7: 0]; - /* We can comment following lines to exclude cores from implementation - * in case we run out of slices. - */ - //---------------------------------------------------------------- // List of Available Cores //---------------------------------------------------------------- + // Comment following lines to exclude cores from implementation. `define USE_CORE_SHA1 `define USE_CORE_SHA256 `define USE_CORE_SHA512 @@ -142,8 +142,10 @@ XXX move to `define in wrapper core?? // SHA-1 //---------------------------------------------------------------- `ifdef USE_CORE_SHA1 - wire [31: 0] read_data_sha1; wire enable_sha1 = sys_ena && (addr_core_num == CORE_ADDR_SHA1); + wire [31: 0] read_data_sha1; + wire error_sha1; + sha1 sha1_inst ( .clk(sys_clk), @@ -154,7 +156,8 @@ XXX move to `define in wrapper core?? .address(addr_core_reg), .write_data(sys_write_data), - .read_data(read_data_sha1) + .read_data(read_data_sha1), + .error(error_sha1) ); `endif @@ -163,8 +166,10 @@ XXX move to `define in wrapper core?? // SHA-256 //---------------------------------------------------------------- `ifdef USE_CORE_SHA256 - wire [31: 0] read_data_sha256; wire enable_sha256 = sys_ena && (addr_core_num == CORE_ADDR_SHA256); + wire [31: 0] read_data_sha256; + wire error_sha256; + sha256 sha256_inst ( .clk(sys_clk), @@ -175,7 +180,8 @@ XXX move to `define in wrapper core?? .address(addr_core_reg), .write_data(sys_write_data), - .read_data(read_data_sha256) + .read_data(read_data_sha256), + .error(error_sha256) ); `endif @@ -184,8 +190,10 @@ XXX move to `define in wrapper core?? // SHA-512 //---------------------------------------------------------------- `ifdef USE_CORE_SHA512 - wire [31: 0] read_data_sha512; wire enable_sha512 = sys_ena && (addr_core_num == CORE_ADDR_SHA512); + wire [31: 0] read_data_sha512; + wire error_sha512; + sha512 sha512_inst ( .clk(sys_clk), @@ -196,7 +204,8 @@ XXX move to `define in wrapper core?? .address(addr_core_reg), .write_data(sys_write_data), - .read_data(read_data_sha512) + .read_data(read_data_sha512), + .error(error_sha512) ); `endif @@ -205,7 +214,9 @@ XXX move to `define in wrapper core?? // Output (Read Data) Multiplexor //---------------------------------------------------------------- reg [31: 0] sys_read_data_mux; - assign sys_read_data = sys_read_data_mux; + assign sys_read_data = sys_read_data_mux; + reg sys_error_mux; + assign sys_error = sys_error_mux; always @* // @@ -213,19 +224,31 @@ XXX move to `define in wrapper core?? // `ifdef USE_CORE_SHA1 CORE_ADDR_SHA1: - sys_read_data_mux = read_data_sha1; + begin + sys_read_data_mux = read_data_sha1; + sys_error_mux = error_sha1; + end `endif `ifdef USE_CORE_SHA256 CORE_ADDR_SHA256: - sys_read_data_mux = read_data_sha256; + begin + sys_read_data_mux = read_data_sha256; + sys_error_mux = error_sha256; + end `endif `ifdef USE_CORE_SHA512 CORE_ADDR_SHA512: - sys_read_data_mux = read_data_sha512; + begin + sys_read_data_mux = read_data_sha512; + sys_error_mux = error_sha512; + end `endif // default: - sys_read_data_mux = {32{1'b0}}; + begin + sys_read_data_mux = {32{1'b0}}; + sys_error_mux = 1; + end // endcase |