1 files changed, 29 insertions, 9 deletions

diff --git a/core_selector/src/rtl/global_selector.v b/core_selector/src/rtl/global_selector.v
index 25cad4e..523cc9b 100644
--- a/core_selector/src/rtl/global_selector.v
+++ b/core_selector/src/rtl/global_selector.v
@@ -49,15 +49,18 @@ module global_selector
    input wire           sys_eim_wr,
    input wire           sys_eim_rd,
    output wire [31 : 0] sys_read_data,
-   input wire [31 : 0]  sys_write_data
+   input wire [31 : 0]  sys_write_data,
+   output wire          sys_error
    );
 
    
    //----------------------------------------------------------------
    // Address Decoder
    //----------------------------------------------------------------
-   wire [ 5: 0]         addr_core_num   = sys_eim_addr[13: 8];  // upper 6 bits specify core being addressed
-   wire [ 7: 0]         addr_core_reg   = sys_eim_addr[ 7: 0];  // lower 8 bits specify register offset in core
+   // upper 6 bits specify core being addressed
+   wire [ 5: 0]         addr_core_num   = sys_eim_addr[13: 8];
+   // lower 8 bits specify register offset in core
+   wire [ 7: 0]         addr_core_reg   = sys_eim_addr[ 7: 0];
 
 
    //----------------------------------------------------------------
@@ -72,6 +75,8 @@ module global_selector
    //----------------------------------------------------------------
    wire [31: 0]         read_data_board;
    wire                 enable_board = sys_ena && (addr_core_num == CORE_ADDR_BOARD_REGS);
+   wire                 error_board;
+
    board_regs board_regs
      (
       .clk(sys_clk),
@@ -82,7 +87,8 @@ module global_selector
 
       .address(addr_core_reg),
       .write_data(sys_write_data),
-      .read_data(read_data_board)
+      .read_data(read_data_board),
+      .error(error_board)
       );
    
    
@@ -91,6 +97,8 @@ module global_selector
    //----------------------------------------------------------------
    wire [31: 0]         read_data_comm;
    wire                 enable_comm = sys_ena && (addr_core_num == CORE_ADDR_COMM_REGS);
+   wire                 error_comm;
+
    comm_regs comm_regs
      (
       .clk(sys_clk),
@@ -101,7 +109,8 @@ module global_selector
 
       .address(addr_core_reg),
       .write_data(sys_write_data),
-      .read_data(read_data_comm)
+      .read_data(read_data_comm),
+      .error(error_comm)
       );
    
    
@@ -109,19 +118,30 @@ module global_selector
    // Output (Read Data) Multiplexor
    //----------------------------------------------------------------
    reg [31: 0]          sys_read_data_mux;
-   assign sys_read_data = sys_read_data_mux;
+   assign               sys_read_data = sys_read_data_mux;
+   reg                  sys_error_mux;
+   assign               sys_error = sys_error_mux;
    
    always @*
      //
      case (addr_core_num)
        //
        CORE_ADDR_BOARD_REGS:
-         sys_read_data_mux = read_data_board;
+         begin
+            sys_read_data_mux = read_data_board;
+            sys_error_mux = error_board;
+         end
        CORE_ADDR_COMM_REGS:
-         sys_read_data_mux = read_data_comm;
+         begin
+            sys_read_data_mux = read_data_comm;
+            sys_error_mux = error_comm;
+         end
        //
        default:
-         sys_read_data_mux = {32{1'b0}};
+         begin
+            sys_read_data_mux = {32{1'b0}};
+            sys_error_mux = 1;
+         end
        //
      endcase