diff options
Diffstat (limited to 'src/rtl/ipcore/tmp')
| -rw-r--r-- | src/rtl/ipcore/tmp/_xmsgs/netgen.xmsgs | 12 | ||||
| -rw-r--r-- | src/rtl/ipcore/tmp/_xmsgs/pn_parser.xmsgs | 15 | ||||
| -rw-r--r-- | src/rtl/ipcore/tmp/_xmsgs/xst.xmsgs | 84 | ||||
| -rw-r--r-- | src/rtl/ipcore/tmp/multiplier_s6.lso | 1 | ||||
| -rw-r--r-- | src/rtl/ipcore/tmp/subtractor_s6.lso | 1 |
5 files changed, 113 insertions, 0 deletions
diff --git a/src/rtl/ipcore/tmp/_xmsgs/netgen.xmsgs b/src/rtl/ipcore/tmp/_xmsgs/netgen.xmsgs new file mode 100644 index 0000000..00fafd8 --- /dev/null +++ b/src/rtl/ipcore/tmp/_xmsgs/netgen.xmsgs @@ -0,0 +1,12 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!-- IMPORTANT: This is an internal file that has been generated
+ by the Xilinx ISE software. Any direct editing or
+ changes made to this file may result in unpredictable
+ behavior or data corruption. It is strongly advised that
+ users do not edit the contents of this file. -->
+<messages> +<msg type="info" file="NetListWriters" num="633" delta="old" >The generated Verilog netlist contains Xilinx <arg fmt="%s" index="1">UNISIM</arg> simulation primitives and has to be used with <arg fmt="%s" index="2">UNISIM</arg> simulation library for correct compilation and simulation.
+</msg>
+ +</messages> +
diff --git a/src/rtl/ipcore/tmp/_xmsgs/pn_parser.xmsgs b/src/rtl/ipcore/tmp/_xmsgs/pn_parser.xmsgs new file mode 100644 index 0000000..b73af21 --- /dev/null +++ b/src/rtl/ipcore/tmp/_xmsgs/pn_parser.xmsgs @@ -0,0 +1,15 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!-- IMPORTANT: This is an internal file that has been generated -->
+<!-- by the Xilinx ISE software. Any direct editing or -->
+<!-- changes made to this file may result in unpredictable -->
+<!-- behavior or data corruption. It is strongly advised that -->
+<!-- users do not edit the contents of this file. -->
+<!-- -->
+<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
+
+<messages>
+<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "E:/FPGA/ModExpS6_Novena/src/modexps6/ipcore/tmp/_cg/multiplier_s6.v" into library work</arg>
+</msg>
+
+</messages>
+
diff --git a/src/rtl/ipcore/tmp/_xmsgs/xst.xmsgs b/src/rtl/ipcore/tmp/_xmsgs/xst.xmsgs new file mode 100644 index 0000000..8f5c63c --- /dev/null +++ b/src/rtl/ipcore/tmp/_xmsgs/xst.xmsgs @@ -0,0 +1,84 @@ +<?xml version="1.0" encoding="UTF-8"?>
+<!-- IMPORTANT: This is an internal file that has been generated
+ by the Xilinx ISE software. Any direct editing or
+ changes made to this file may result in unpredictable
+ behavior or data corruption. It is strongly advised that
+ users do not edit the contents of this file. -->
+<messages> +<msg type="warning" file="HDLCompiler" num="321" delta="old" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\xbip_utils_v2_0\bip_utils_pkg_v2_0.vhd" Line 1836: Comparison between arrays of unequal length always returns <arg fmt="%s" index="1">FALSE</arg>.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="321" delta="old" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\xbip_utils_v2_0\bip_utils_pkg_v2_0.vhd" Line 1842: Comparison between arrays of unequal length always returns <arg fmt="%s" index="1">FALSE</arg>.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="321" delta="old" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\xbip_utils_v2_0\bip_utils_pkg_v2_0.vhd" Line 1848: Comparison between arrays of unequal length always returns <arg fmt="%s" index="1">FALSE</arg>.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="321" delta="old" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\xbip_utils_v2_0\bip_utils_pkg_v2_0.vhd" Line 1849: Comparison between arrays of unequal length always returns <arg fmt="%s" index="1">FALSE</arg>.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="321" delta="old" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\xbip_utils_v2_0\bip_utils_pkg_v2_0.vhd" Line 1850: Comparison between arrays of unequal length always returns <arg fmt="%s" index="1">FALSE</arg>.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="321" delta="old" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\xbip_utils_v2_0\bip_utils_pkg_v2_0.vhd" Line 1851: Comparison between arrays of unequal length always returns <arg fmt="%s" index="1">FALSE</arg>.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="321" delta="old" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\xbip_utils_v2_0\bip_utils_pkg_v2_0.vhd" Line 1852: Comparison between arrays of unequal length always returns <arg fmt="%s" index="1">FALSE</arg>.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="746" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\mult_gen_pkg_v11_2.vhd" Line 2242: Range is empty (null range)
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="871" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 3441: Using initial value <arg fmt="%s" index="1">'0'</arg> for <arg fmt="%s" index="2">ce_opmode</arg> since it is never assigned
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 260: Net <<arg fmt="%s" index="1">c[0][1][47]</arg>> does not have a driver.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 264: Net <<arg fmt="%s" index="1">d[0][0][17]</arg>> does not have a driver.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 3436: Net <<arg fmt="%s" index="1">use_DSP48a.appDSP48A[0].bppDSP48A[0].cec</arg>> does not have a driver.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 3437: Net <<arg fmt="%s" index="1">use_DSP48a.appDSP48A[0].bppDSP48A[0].ced</arg>> does not have a driver.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 3438: Net <<arg fmt="%s" index="1">use_DSP48a.appDSP48A[0].bppDSP48A[0].cem</arg>> does not have a driver.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 3439: Net <<arg fmt="%s" index="1">use_DSP48a.appDSP48A[0].bppDSP48A[0].cep</arg>> does not have a driver.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 3440: Net <<arg fmt="%s" index="1">use_DSP48a.appDSP48A[0].bppDSP48A[0].ce_carryin</arg>> does not have a driver.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 3443: Net <<arg fmt="%s" index="1">use_DSP48a.appDSP48A[0].bppDSP48A[0].cin_dsp48a</arg>> does not have a driver.
+</msg>
+ +<msg type="warning" file="HDLCompiler" num="634" delta="new" >"E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\mult_gen_v11_2\dsp.vhd" Line 3435: Net <<arg fmt="%s" index="1">use_DSP48a.appDSP48A[1].bppDSP48A[0].ceb</arg>> does not have a driver.
+</msg>
+ +<msg type="info" file="Xst" num="3210" delta="new" >"<arg fmt="%s" index="1">E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\multiplier_s6.vhd</arg>" line <arg fmt="%s" index="2">110</arg>: Output port <<arg fmt="%s" index="3">zero_detect</arg>> of the instance <<arg fmt="%s" index="4">U0</arg>> is unconnected or connected to loadless signal.
+</msg>
+ +<msg type="info" file="Xst" num="3210" delta="new" >"<arg fmt="%s" index="1">E:\FPGA\ModExpS6_Novena\src\modexps6\ipcore\tmp\_cg\_dbg\multiplier_s6.vhd</arg>" line <arg fmt="%s" index="2">110</arg>: Output port <<arg fmt="%s" index="3">pcasc</arg>> of the instance <<arg fmt="%s" index="4">U0</arg>> is unconnected or connected to loadless signal.
+</msg>
+ +<msg type="info" file="Xst" num="1901" delta="new" >Instance <arg fmt="%s" index="1">use_DSP48a.appDSP48A[0].bppDSP48A[0].iDSP48A</arg> in unit <arg fmt="%s" index="2">dsp</arg> of type <arg fmt="%s" index="3">DSP48A</arg> has been replaced by <arg fmt="%s" index="4">DSP48A1</arg>
+</msg>
+ +<msg type="info" file="Xst" num="1901" delta="new" >Instance <arg fmt="%s" index="1">use_DSP48a.appDSP48A[0].bppDSP48A[1].iDSP48A</arg> in unit <arg fmt="%s" index="2">dsp</arg> of type <arg fmt="%s" index="3">DSP48A</arg> has been replaced by <arg fmt="%s" index="4">DSP48A1</arg>
+</msg>
+ +<msg type="info" file="Xst" num="1901" delta="new" >Instance <arg fmt="%s" index="1">use_DSP48a.appDSP48A[1].bppDSP48A[0].iDSP48A</arg> in unit <arg fmt="%s" index="2">dsp</arg> of type <arg fmt="%s" index="3">DSP48A</arg> has been replaced by <arg fmt="%s" index="4">DSP48A1</arg>
+</msg>
+ +<msg type="info" file="Xst" num="1901" delta="new" >Instance <arg fmt="%s" index="1">use_DSP48a.appDSP48A[1].bppDSP48A[1].iDSP48A</arg> in unit <arg fmt="%s" index="2">dsp</arg> of type <arg fmt="%s" index="3">DSP48A</arg> has been replaced by <arg fmt="%s" index="4">DSP48A1</arg>
+</msg>
+ +<msg type="info" file="Xst" num="2169" delta="new" >HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems.
+</msg>
+ +</messages> +
diff --git a/src/rtl/ipcore/tmp/multiplier_s6.lso b/src/rtl/ipcore/tmp/multiplier_s6.lso new file mode 100644 index 0000000..22de730 --- /dev/null +++ b/src/rtl/ipcore/tmp/multiplier_s6.lso @@ -0,0 +1 @@ +work
diff --git a/src/rtl/ipcore/tmp/subtractor_s6.lso b/src/rtl/ipcore/tmp/subtractor_s6.lso new file mode 100644 index 0000000..22de730 --- /dev/null +++ b/src/rtl/ipcore/tmp/subtractor_s6.lso @@ -0,0 +1 @@ +work
|