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-rw-r--r--src/rtl/ipcore/_xmsgs/pn_parser.xmsgs15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/rtl/ipcore/_xmsgs/pn_parser.xmsgs b/src/rtl/ipcore/_xmsgs/pn_parser.xmsgs
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+<?xml version="1.0" encoding="UTF-8"?>
+<!-- IMPORTANT: This is an internal file that has been generated -->
+<!-- by the Xilinx ISE software. Any direct editing or -->
+<!-- changes made to this file may result in unpredictable -->
+<!-- behavior or data corruption. It is strongly advised that -->
+<!-- users do not edit the contents of this file. -->
+<!-- -->
+<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. -->
+
+<messages>
+<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file &quot;/home/pselkirk/cryptech/core/math/modexps6/src/rtl/ipcore/subtractor_s6.v&quot; into library work</arg>
+</msg>
+
+</messages>
+