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| author | Paul Selkirk <paul@psgd.org> | 2015-07-17 11:57:51 -0400 |
|---|---|---|
| committer | Paul Selkirk <paul@psgd.org> | 2015-07-17 11:57:51 -0400 |
| commit | 1acddf19bb8c39f5202d80af068b5ffd14797f4b (patch) | |
| tree | 5369e18a361f4e88b4c0f751fe5f202e566d31f3 /src/rtl/ipcore/_xmsgs/pn_parser.xmsgs | |
Initial commit
Diffstat (limited to 'src/rtl/ipcore/_xmsgs/pn_parser.xmsgs')
| -rw-r--r-- | src/rtl/ipcore/_xmsgs/pn_parser.xmsgs | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/rtl/ipcore/_xmsgs/pn_parser.xmsgs b/src/rtl/ipcore/_xmsgs/pn_parser.xmsgs new file mode 100644 index 0000000..cd873b7 --- /dev/null +++ b/src/rtl/ipcore/_xmsgs/pn_parser.xmsgs @@ -0,0 +1,15 @@ +<?xml version="1.0" encoding="UTF-8"?> +<!-- IMPORTANT: This is an internal file that has been generated --> +<!-- by the Xilinx ISE software. Any direct editing or --> +<!-- changes made to this file may result in unpredictable --> +<!-- behavior or data corruption. It is strongly advised that --> +<!-- users do not edit the contents of this file. --> +<!-- --> +<!-- Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved. --> + +<messages> +<msg type="info" file="ProjectMgmt" num="1845" ><arg fmt="%s" index="1">Analyzing Verilog file "/home/pselkirk/cryptech/core/math/modexps6/src/rtl/ipcore/subtractor_s6.v" into library work</arg> +</msg> + +</messages> + |