| Age | Commit message (Expand) | Author |
|---|---|---|
| 2018-08-28 | Added pipeline register and stall cycle in the FSM to accomodate the pipeline... | Joachim Strömbergson |
| 2016-05-31 | Adding functionality to support both SHA224 and SHA256 digest modes. Note: Th... | Joachim Strömbergson |
| 2015-12-13 | whack copyrights | Paul Selkirk |
| 2015-07-16 | Added logic to write state into the state registers. Simplified the state wri... | Joachim Strömbergson |
| 2015-07-16 | The digest is the complete state so we only need to be able to write back sta... | Joachim Strömbergson |
| 2015-07-16 | (1) Adding addresses to be able to read and write the internal hash state fro... | Joachim Strömbergson |
| 2014-11-07 | Changed to asynch reset. | Joachim Strömbergson |
| 2014-11-06 | Fixed nits found using verilator linter. Removed trailing whitespace. | Joachim Strömbergson |
| 2014-02-22 | Changed W-memory into sliding window. This also affected interface and integr... | Joachim Strömbergson |
| 2014-02-19 | Source for the main part of the sha256 core. | Joachim Strömbergson |
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index : core/hash/sha256 | |
| Verilog implementation of the SHA-256 cryptographic hash function | git repositories |
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