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core/hash/sha1
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Verilog implementation of the SHA-1 cryptographic hash function
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2014-11-06
(1) Minor fixes of nits found by the verilator linter. (2) Removed trailing w...
Joachim Strömbergson
2014-04-01
Update of the Python model to support NIST dual block message test as well as...
Joachim Strömbergson
2014-03-17
Removed redundant flag reset wires.
Joachim Strömbergson
2014-03-16
Added wait to allow the ready flag to be dropped with resettable flags. Fixed...
Joachim Strömbergson
2014-03-14
Updating interface. Addding self resetting control regs. Fixing missing input...
Joachim Strömbergson
2014-02-25
Adding info about the sha1 design.
Joachim Strömbergson
2014-02-23
Adding more info about the core.
Joachim Strömbergson
2014-02-23
Updated W memory module with new sliding window version. Updated README with ...
Joachim Strömbergson
2014-02-21
Adding all testbenches.
Joachim Strömbergson
2014-02-21
Adding all rtl source files for the sha-1 core.
Joachim Strömbergson
2014-02-21
Adding functional model in Python. Used to drive RTL development.
Joachim Strömbergson
2014-02-21
Adding README file in markdown format.
Joachim Strömbergson
2014-02-21
Adding license file.
Joachim Strömbergson
2014-02-21
Adding Makefile for compiling and running simulations of the sha1 core.
Joachim Strömbergson