| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-02-08 | (1) Removed reset input port from qr module, qr module instances and qr modul...HEADmaster | Joachim Strömbergson |
| 2018-08-23 | Debugged pipeline register and state update. All test cases ok.timing_fix | Joachim Strömbergson |
| 2018-08-23 | Added missing define. | Joachim Strömbergson |
| 2018-08-23 | (1) Adding pipeline register update code and a set of pipeline registers. Reg... | Joachim Strömbergson |
| 2018-08-23 | (1) Updated qr interface to include clock and reset needed for internal pipel... | Joachim Strömbergson |
| 2016-12-28 | (1) Cleanup of top an core code with no functional changes. The code is now m...cleanup | Joachim Strömbergson |
| 2015-04-30 | (1) Added api addresses and constants for core name and version. (2) Changed ... | Joachim Strömbergson |
| 2014-09-03 | Adding testbenches for core and top. | Joachim Strömbergson |
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index : core/cipher/chacha | |
| Verilog 2001 implementation of the ChaCha stream cipher | git repositories |
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