| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-06-09 | Clarified the cycle times that was confusing regarding key expansion. Fixed m...HEADmaster | Joachim Strömbergson |
| 2018-05-26 | Shaved off another cycle for block processing. | Joachim Strömbergson |
| 2018-05-22 | Updated README with latest implementation results and status for the core. | Joachim Strömbergson |
| 2018-05-22 | Combined all AES round operations into a single operation for a round. | Joachim Strömbergson |
| 2018-05-22 | Updated README with implementation results. | Joachim Strömbergson |
| 2018-05-21 | Updated core status and implementation details. | Joachim Strömbergson |
| 2018-05-21 | Connected the new S-boxes and collapsed the SubBytes operation into one cycle... | Joachim Strömbergson |
| 2018-05-21 | Adding inital version of AES core optimized for performance. | Joachim Strömbergson |
| 2014-11-27 | Adding readme for the aes core. | Joachim Strömbergson |
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index : core/cipher/aes | |
| Verilog implementation of the symmetric block cipher AES (Advanced Encryption Standard) | git repositories |
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