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+```
+#!htmlcomment
+
+This page is maintained automatically by a script. Don't modify this page by hand,
+your changes will just be overwritten the next time the script runs. Talk to your
+Friendly Neighborhood Repository Maintainer if you need to change something here.
+
+```
+
+```
+#!html
+<h1>eim</h1>
+
+<p>Verilog implementation of the eim interface used to connect FPGA cores
+to the Freescale i.MX6 CPU.</p>
+```
+
+[[RepositoryIndex(format=table,glob=core/comm/eim)]]
+
+| Clone `https://git.cryptech.is/core/comm/eim.git` |
+|---|