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diff --git a/pelican/content/RoughV1.md b/pelican/content/RoughV1.md index b52a3cf..c6bb597 100644 --- a/pelican/content/RoughV1.md +++ b/pelican/content/RoughV1.md @@ -121,11 +121,9 @@ Verilog. * What components we ship - life is compromise * Toolchains, Verilog, C, ... * FPGAs and ASICs use a Verilog-based toolchain. There are no mature open - Verilog compilers so the [DDC approach](http://www.dwheeler.com/trusting-trust/) will not work. Net-list optimization is also an issue. We're looking into this, but it's going to be really hard. Research for v2. - * Protoyping platform * [Bunnie's Novena laptop](http://www.bunniestudios.com/blog/?p=3265) * Altera Evaluation Board |