* mostly cosmetic fixes related to debug output

 * fixed REGULAR_ADD opcode to match how hardware works

1 files changed, 27 insertions, 28 deletions

diff --git a/modexpng_fpga_model.py b/modexpng_fpga_model.py
index 41acbff..334eecc 100644
--- a/modexpng_fpga_model.py
+++ b/modexpng_fpga_model.py
@@ -93,7 +93,7 @@ DUMP_EXPONENTS         = False  # dump secret exponents
 FORCE_OVERFLOW         = False  # force rarely seen internal overflow situation to verify how its handler works
 DUMP_PROGRESS_FACTOR   = 16     # once per how many ladder steps to update progress indicator
 DUMP_FORMAT_BUS        = True   # False: dump 18-bit words, True: dump 32-bit words
-DUMP_FORMAT_C_ARRAY    = False   # False: dump in Verilog format, True: dump as C array initializer
+DUMP_FORMAT_C_ARRAY    = False  # False: dump in Verilog format, True: dump as C array initializer
 
 
 #
@@ -1102,7 +1102,7 @@ class ModExpNG_Worker():
             ab = ModExpNG_Operand(None, 2 * ab_num_words, ab_words)
 
         if dump and DUMP_VECTORS:
-            ab.format_verilog_concat("%s_%s_AB" % (dump_crt, dump_ladder))
+            ab.format("%s_%s_AB" % (dump_crt, dump_ladder))
 
         if not bnk is None:
             bnk._set_wide(ModExpNG_WideBankEnum.L, ab.lower_half())
@@ -1121,7 +1121,7 @@ class ModExpNG_Worker():
         q = ModExpNG_Operand(None, ab_num_words + 1, q_words)
 
         if dump and DUMP_VECTORS:
-            q.format_verilog_concat("%s_%s_Q" % (dump_crt, dump_ladder))
+            q.format("%s_%s_Q" % (dump_crt, dump_ladder))
 
         if not bnk is None:
             bnk._set_narrow(ModExpNG_NarrowBankEnum.Q, q)
@@ -1139,7 +1139,7 @@ class ModExpNG_Worker():
         m = ModExpNG_Operand(None, 2 * ab_num_words + 1, m_words)
 
         if dump and DUMP_VECTORS:
-            m.format_verilog_concat("%s_%s_M" % (dump_crt, dump_ladder))
+            m.format("%s_%s_M" % (dump_crt, dump_ladder))
 
         #
         # 4. R = AB + M
@@ -1160,7 +1160,6 @@ class ModExpNG_Worker():
 
             r_cy = r_cy_new
 
-
         #
         # 4b. Initialize empty result
         #
@@ -1216,12 +1215,12 @@ class ModExpNG_Core():
 
     def _dump_bank_indices(self, n):
         print("                  ", end='')
-        for i in range(64): print("[ %3d ] " % i, end='')
+        for i in range(n): print("[ %3d ] " % i, end='')
         print("");
 
     def _dump_bank_seps(self, n):
         print("                  ", end='')
-        for i in range(64): print(" ------ ", end='')
+        for i in range(n): print("------- ", end='')
         print("");
         
     def _dump_bank_entry_narrow(self, name, op, val, n):
@@ -1561,11 +1560,11 @@ class ModExpNG_Core():
     # adds sel_narrow_a_in to sel_narrow_b_in
     # stores result in sel_narrow_out
     #
-    def regular_add(self, sel_narrow_a_in, sel_narrow_b_in, sel_narrow_out, num_words):
-        xxa = self.bnk.crt_x.ladder_x._get_narrow(sel_narrow_a_in)
-        xya = self.bnk.crt_x.ladder_y._get_narrow(sel_narrow_a_in)
-        yxa = self.bnk.crt_y.ladder_x._get_narrow(sel_narrow_a_in)
-        yya = self.bnk.crt_y.ladder_y._get_narrow(sel_narrow_a_in)
+    def regular_add(self, sel_wide_a_in, sel_narrow_b_in, sel_narrow_out, num_words):
+        xxa = self.bnk.crt_x.ladder_x._get_wide(sel_wide_a_in)
+        xya = self.bnk.crt_x.ladder_y._get_wide(sel_wide_a_in)
+        yxa = self.bnk.crt_y.ladder_x._get_wide(sel_wide_a_in)
+        yya = self.bnk.crt_y.ladder_y._get_wide(sel_wide_a_in)
 
         xxb = self.bnk.crt_x.ladder_x._get_narrow(sel_narrow_b_in)
         xyb = self.bnk.crt_x.ladder_y._get_narrow(sel_narrow_b_in)
@@ -1589,23 +1588,23 @@ class ModExpNG_Core():
         print("num_words = %d" % pq)
         print("\rladder_mode_x = %d" % m[0])
         print("\rladder_mode_y = %d" % m[1])
-        self.bnk.crt_x.ladder_x._get_narrow(N.C).format_verilog_concat("X_X")
-        self.bnk.crt_x.ladder_y._get_narrow(N.C).format_verilog_concat("X_Y")
-        self.bnk.crt_y.ladder_x._get_narrow(N.C).format_verilog_concat("Y_X")
-        self.bnk.crt_y.ladder_y._get_narrow(N.C).format_verilog_concat("Y_Y")
-        self.bnk.crt_x.ladder_x._get_wide(W.N).format_verilog_concat("X_N")
-        self.bnk.crt_x.ladder_x._get_wide(W.N).format_verilog_concat("Y_N")
-        self.bnk.crt_x.ladder_x._get_narrow(N.N_COEFF).format_verilog_concat("X_N_COEFF")
-        self.bnk.crt_x.ladder_x._get_narrow(N.N_COEFF).format_verilog_concat("Y_N_COEFF")
+        self.bnk.crt_x.ladder_x._get_narrow(N.C).format("X_X")
+        self.bnk.crt_x.ladder_y._get_narrow(N.C).format("X_Y")
+        self.bnk.crt_y.ladder_x._get_narrow(N.C).format("Y_X")
+        self.bnk.crt_y.ladder_y._get_narrow(N.C).format("Y_Y")
+        self.bnk.crt_x.ladder_x._get_wide(W.N).format("X_N")
+        self.bnk.crt_x.ladder_x._get_wide(W.N).format("Y_N")
+        self.bnk.crt_x.ladder_x._get_narrow(N.N_COEFF).format("X_N_COEFF")
+        self.bnk.crt_x.ladder_x._get_narrow(N.N_COEFF).format("Y_N_COEFF")
 
     #
     # dump working variables after ladder step
     #
     def dump_after_step_using_crt(self):
-        self.bnk.crt_x.ladder_x._get_narrow(N.C).format_verilog_concat("X_X")
-        self.bnk.crt_x.ladder_y._get_narrow(N.C).format_verilog_concat("X_Y")
-        self.bnk.crt_y.ladder_x._get_narrow(N.C).format_verilog_concat("Y_X")
-        self.bnk.crt_y.ladder_y._get_narrow(N.C).format_verilog_concat("Y_Y")
+        self.bnk.crt_x.ladder_x._get_narrow(N.C).format("X_X")
+        self.bnk.crt_x.ladder_y._get_narrow(N.C).format("X_Y")
+        self.bnk.crt_y.ladder_x._get_narrow(N.C).format("Y_X")
+        self.bnk.crt_y.ladder_y._get_narrow(N.C).format("Y_Y")
 
     #
     # this deliberately converts narrow operand into redundant representation
@@ -1733,7 +1732,7 @@ def sign_using_crt():
     c.modular_multiply(W.C, N.I, W.D, N.D, n)                      # | [XY] / N_FACTOR        | [XY]F | [XY]YM           | [XY]M   | M         | [XY]M = [XY]MF * 1
                                                                    # +------------------------+-------+------------------+---------+-----------+    
     c.propagate_carries(N.D, n)                                    # | [XY] / N_FACTOR        | [XY]F | [XY]YM           | [XY]M   | M         |
-                                                                   # +------------------------+-------+------------------+---------+-----------+
+                                                                   # +------------------------+-------+------------------+---------+-----------+    
     c.set_output_from_narrow_x(O.XM, c.bnk.crt_x, N.D)             # | [XY] / N_FACTOR        | [XY]F | [XY]YM           | [XY]M   | M         |
     c.set_output_from_narrow_x(O.YM, c.bnk.crt_y, N.D)             # | [XY] / N_FACTOR        | [XY]F | [XY]YM           | [XY]M   | M         |
                                                                    # +------------------------+-------+------------------+---------+-----------+
@@ -1762,7 +1761,7 @@ def sign_using_crt():
     c.modular_multiply(W.A, N.I, W.C, N.C, pq)                     # | [PQ]_FACTOR            | [XY]F | [PQ]IF           | [PQ]MBF | QINV      | [PQ]IF = 1 * [PQ]_FACTOR
                                                                    # +------------------------+-------+------------------+---------+-----------+
     c.copy_ladders_x2y(W.D, N.D, W.C, N.C)                         # | [PQ]_FACTOR            | [XY]F | [PQ]IF / [PQ]MBF | [PQ]MBF | QINV      |
-                                                                   # +------------------------+-------+------------------+---------+-----------+
+                                                                   # +------------------------+-------+------------------+---------+-----------+    
     ###########################                                    # |                        |       |                  |         |           |
     # Begin Montgomery Ladder #                                    # |                        |       |                  |         |           |
     ###########################                                    # |                        |       |                  |         |           |
@@ -1807,8 +1806,8 @@ def sign_using_crt():
                                                                    # +------------------------+-------+------------------+---------+-----------+
     c.copy_crt_y2x(W.D, N.D)                                       # | [PQ]_FACTOR / QRSBI    | [XY]F |  RSBI            |  QSB*   |           |
                                                                    # +------------------------+-------+------------------+---------+-----------+
-    c.regular_add(N.D, N.A, N.C, pq)                               # | [PQ]_FACTOR / QRSBI    | [XY]F |  SB              |  QSB*   |           | SB = QSB + RSBI
-                                                                   # +------------------------+-------+------------------+---------+-----------+
+    c.regular_add(W.D, N.A, N.C, pq)                               # | [PQ]_FACTOR / QRSBI    | [XY]F |  SB              |  QSB*   |           | SB = QSB + RSBI
+                                                                   # +------------------------+-------+------------------+---------+-----------+    
     c.set_wide_from_input  (c.bnk.crt_x, W.N, I.N)                 # |                        |       |                  |         |           |
     c.set_wide_from_input  (c.bnk.crt_y, W.N, I.N)                 # |                        |       |                  |         |           |
                                                                    # +------------------------+-------+------------------+---------+-----------+