path: root/rtl/modexpng_core_top.v

module modexpng_core_top
(
    clk, clk_bus,
    rst,
    next, valid,
    word_index_last,
    bus_cs,
    bus_we,
    bus_addr,
    bus_data_wr,
    bus_data_rd
);

    
    //
    // Headers
    //
    `include "modexpng_parameters.vh"

    
    //
    // Ports
    //
    input                                           clk;
    input                                           clk_bus;
    
    input                                           rst;
    
    input                                           next;
    output                                          valid;

    input                                           bus_cs;
    input                                           bus_we;
    input  [4 * (BANK_ADDR_W + BUS_OP_ADDR_W) -1:0] bus_addr;
    input  [                   BUS_DATA_W     -1:0] bus_data_wr;
    output [                   BUS_DATA_W     -1:0] bus_data_rd;
    
    
  

endmodule