diff options
Diffstat (limited to 'Src')
| -rw-r--r-- | Src/main.c | 283 | ||||
| -rw-r--r-- | Src/stm-fmc.c | 303 | ||||
| -rw-r--r-- | Src/stm-fmc.h | 46 | ||||
| -rw-r--r-- | Src/stm32f4xx_hal_msp.c | 107 | ||||
| -rw-r--r-- | Src/stm32f4xx_it.c | 73 |
5 files changed, 812 insertions, 0 deletions
diff --git a/Src/main.c b/Src/main.c new file mode 100644 index 0000000..705a04f --- /dev/null +++ b/Src/main.c @@ -0,0 +1,283 @@ +//------------------------------------------------------------------------------
+// main.c
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Headers
+//------------------------------------------------------------------------------
+#include "stm32f4xx_hal.h"
+#include "stm-fmc.h"
+
+
+//------------------------------------------------------------------------------
+// Defines
+//------------------------------------------------------------------------------
+#define GPIO_PORT_LEDS GPIOJ
+
+#define GPIO_PIN_LED_RED GPIO_PIN_1
+#define GPIO_PIN_LED_YELLOW GPIO_PIN_2
+#define GPIO_PIN_LED_GREEN GPIO_PIN_3
+#define GPIO_PIN_LED_BLUE GPIO_PIN_4
+
+
+//------------------------------------------------------------------------------
+// Macros
+//------------------------------------------------------------------------------
+#define led_on(pin) HAL_GPIO_WritePin(GPIO_PORT_LEDS,pin,GPIO_PIN_SET)
+#define led_off(pin) HAL_GPIO_WritePin(GPIO_PORT_LEDS,pin,GPIO_PIN_RESET)
+#define led_toggle(pin) HAL_GPIO_TogglePin(GPIO_PORT_LEDS,pin)
+
+
+//------------------------------------------------------------------------------
+// Variables
+//------------------------------------------------------------------------------
+RNG_HandleTypeDef rng_inst;
+
+
+
+//------------------------------------------------------------------------------
+// Prototypes
+//------------------------------------------------------------------------------
+void SystemClock_Config(void);
+
+static void MX_RNG_Init(void);
+static void MX_GPIO_Init(void);
+
+int test_fpga_data_bus(void);
+int test_fpga_address_bus(void);
+
+
+//------------------------------------------------------------------------------
+// Defines
+//------------------------------------------------------------------------------
+#define TEST_NUM_ROUNDS 100000
+
+
+//------------------------------------------------------------------------------
+int main(void)
+//------------------------------------------------------------------------------
+{
+ // initialize hal
+ HAL_Init();
+
+ // configure system clock
+ SystemClock_Config();
+
+ // initialize gpio
+ MX_GPIO_Init();
+
+ // initialize rng
+ MX_RNG_Init();
+
+ // prepare fmc interface
+ fmc_init();
+
+ // turn on green led, turn off other leds
+ led_on(GPIO_PIN_LED_GREEN);
+ led_off(GPIO_PIN_LED_YELLOW);
+ led_off(GPIO_PIN_LED_RED);
+ led_off(GPIO_PIN_LED_BLUE);
+
+ // vars
+ int test_ok;
+
+ // main loop (test, until an error is detected)
+ while (1)
+ {
+ // test data bus
+ test_ok = test_fpga_data_bus();
+
+ // check for errors (abort testing in case of error)
+ if (test_ok < TEST_NUM_ROUNDS) /*break*/;
+
+
+ // test address bus
+ test_ok = test_fpga_address_bus();
+
+ // check for errors (abort testing in case of error)
+ if (test_ok < TEST_NUM_ROUNDS) /*break*/;
+
+ // toggle yellow led to indicate, that we are alive
+ led_toggle(GPIO_PIN_LED_YELLOW);
+ }
+
+ // error handler
+ while (1)
+ {
+ // turn on red led, turn off other leds
+ led_on(GPIO_PIN_LED_RED);
+ led_off(GPIO_PIN_LED_GREEN);
+ led_off(GPIO_PIN_LED_YELLOW);
+ led_off(GPIO_PIN_LED_BLUE);
+ }
+
+ // should never reach this line
+}
+
+
+//------------------------------------------------------------------------------
+int test_fpga_data_bus(void)
+//------------------------------------------------------------------------------
+{
+ int c, ok;
+ uint32_t rnd, buf;
+ HAL_StatusTypeDef hal_result;
+
+ // run some rounds of data bus test
+ for (c=0; c<TEST_NUM_ROUNDS; c++)
+ {
+ // try to generate "random" number
+ hal_result = HAL_RNG_GenerateRandomNumber(&rng_inst, &rnd);
+ if (hal_result != HAL_OK) break;
+
+ // write value to fpga at address 0
+ ok = fmc_write_32(0, &rnd);
+ if (ok != 0) break;
+
+ // read value from fpga
+ ok = fmc_read_32(0, &buf);
+ if (ok != 0) break;
+
+ // compare (abort testing in case of error)
+ if (buf != rnd)
+ {
+ uint32_t diff = buf;
+ diff ^= rnd;
+ diff = 0; // place breakpoint here if needed
+ break;
+ }
+ }
+
+ // return number of successful tests
+ return c;
+}
+
+
+//------------------------------------------------------------------------------
+int test_fpga_address_bus(void)
+//------------------------------------------------------------------------------
+{
+ int c, ok;
+ uint32_t rnd, buf;
+ HAL_StatusTypeDef hal_result;
+
+ // run some rounds of address bus test
+ for (c=0; c<TEST_NUM_ROUNDS; c++)
+ {
+ // try to generate "random" number
+ hal_result = HAL_RNG_GenerateRandomNumber(&rng_inst, &rnd);
+ if (hal_result != HAL_OK) break;
+
+ // we only have 2^22 32-bit words
+ rnd &= 0x00FFFFFC;
+
+ // don't test zero addresses (fpga will store data, not address)
+ if (rnd == 0) continue;
+
+ // write dummy value to fpga at some non-zero address
+ ok = fmc_write_32(rnd, &buf);
+ if (ok != 0) break;
+
+ // read value from fpga
+ ok = fmc_read_32(0, &buf);
+ if (ok != 0) break;
+
+ // fpga receives address of 32-bit word, while we need
+ // byte address here to compare
+ buf <<= 2;
+
+ // compare (abort testing in case of error)
+ if (buf != rnd)
+ {
+ uint32_t diff = buf;
+ diff ^= rnd;
+ diff = 0; // place breakpoint here if needed
+ break;
+ }
+ }
+
+ return c;
+}
+
+
+//------------------------------------------------------------------------------
+void SystemClock_Config(void)
+//------------------------------------------------------------------------------
+{
+
+ RCC_OscInitTypeDef RCC_OscInitStruct;
+ RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+ __PWR_CLK_ENABLE();
+
+ __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+ RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+ RCC_OscInitStruct.HSICalibrationValue = 16;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+ RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+ RCC_OscInitStruct.PLL.PLLM = 12;
+ RCC_OscInitStruct.PLL.PLLN = 270;
+ RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+ RCC_OscInitStruct.PLL.PLLQ = 8;
+ HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+ HAL_PWREx_ActivateOverDrive();
+
+ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK|RCC_CLOCKTYPE_PCLK1
+ |RCC_CLOCKTYPE_PCLK2;
+ RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+ RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+ RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+ RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+ HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
+
+ HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq()/1000);
+
+ HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+}
+
+
+//------------------------------------------------------------------------------
+void MX_RNG_Init(void)
+//------------------------------------------------------------------------------
+{
+ rng_inst.Instance = RNG;
+ HAL_RNG_Init(&rng_inst);
+}
+
+
+//------------------------------------------------------------------------------
+void MX_GPIO_Init(void)
+//------------------------------------------------------------------------------
+{
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ __GPIOJ_CLK_ENABLE();
+
+ GPIO_InitStruct.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4;
+ GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_LOW;
+ HAL_GPIO_Init(GPIOJ, &GPIO_InitStruct);
+}
+
+
+//------------------------------------------------------------------------------
+#ifdef USE_FULL_ASSERT
+//------------------------------------------------------------------------------
+void assert_failed(uint8_t* file, uint32_t line)
+//------------------------------------------------------------------------------
+{
+}
+//------------------------------------------------------------------------------
+#endif
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// EOF
+//------------------------------------------------------------------------------
diff --git a/Src/stm-fmc.c b/Src/stm-fmc.c new file mode 100644 index 0000000..980c8bf --- /dev/null +++ b/Src/stm-fmc.c @@ -0,0 +1,303 @@ +//------------------------------------------------------------------------------
+// stm-fmc.c
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Headers
+//------------------------------------------------------------------------------
+#include "stm-fmc.h"
+
+
+//------------------------------------------------------------------------------
+// Variables
+//------------------------------------------------------------------------------
+SRAM_HandleTypeDef _fmc_fpga_inst;
+
+
+//------------------------------------------------------------------------------
+void fmc_init(void)
+//------------------------------------------------------------------------------
+{
+ // configure fmc pins
+ _fmc_init_gpio();
+
+ // configure fmc registers
+ _fmc_init_params();
+}
+
+
+//------------------------------------------------------------------------------
+int fmc_write_32(uint32_t addr, uint32_t *data)
+//------------------------------------------------------------------------------
+{
+ // calculate target fpga address
+ uint32_t ptr = FMC_FPGA_BASE_ADDR + (addr & FMC_FPGA_ADDR_MASK);
+
+ // write data to fpga
+ HAL_StatusTypeDef ok = HAL_SRAM_Write_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1);
+
+ // check for error
+ if (ok != HAL_OK) return -1;
+
+ // wait for transaction to complete
+ int wait = _fmc_nwait_idle();
+
+ // check for timeout
+ if (wait != 0) return -1;
+
+ // everything went ok
+ return 0;
+}
+
+
+//------------------------------------------------------------------------------
+int fmc_read_32(uint32_t addr, uint32_t *data)
+ //------------------------------------------------------------------------------
+{
+ // calculate target fpga address
+ uint32_t ptr = FMC_FPGA_BASE_ADDR + (addr & FMC_FPGA_ADDR_MASK);
+
+ // perform dummy read transaction
+ HAL_StatusTypeDef ok = HAL_SRAM_Read_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1);
+
+ // check for error
+ if (ok != HAL_OK) return -1;
+
+ // wait for dummy transaction to complete
+ int wait = _fmc_nwait_idle();
+
+ // check for timeout
+ if (wait != 0) return -1;
+
+ // read data from fpga
+ ok = HAL_SRAM_Read_32b(&_fmc_fpga_inst, (uint32_t *)ptr, data, 1);
+
+ // check for error
+ if (ok != HAL_OK) return -1;
+
+ // wait for read transaction to complete
+ wait = _fmc_nwait_idle();
+
+ // check for timeout
+ if (wait != 0) return -1;
+
+ // everything went ok
+ return 0;
+}
+
+
+//------------------------------------------------------------------------------
+int _fmc_nwait_idle()
+//------------------------------------------------------------------------------
+{
+ int cnt; // counter
+
+ // poll NWAIT (number of iterations is limited)
+ for (cnt=0; cnt<FMC_FPGA_NWAIT_MAX_POLL_TICKS; cnt++)
+ {
+ // read pin state
+ GPIO_PinState nwait = HAL_GPIO_ReadPin(FMC_GPIO_PORT_NWAIT, FMC_GPIO_PIN_NWAIT);
+
+ // stop waiting if fpga is ready
+ if (nwait == FMC_NWAIT_IDLE) break;
+ }
+
+ // check for timeout
+ if (cnt >= FMC_FPGA_NWAIT_MAX_POLL_TICKS) return -1;
+
+ // ok
+ return 0;
+}
+
+//------------------------------------------------------------------------------
+void _fmc_init_gpio(void)
+//------------------------------------------------------------------------------
+{
+ // enable gpio clocks
+ __GPIOA_CLK_ENABLE();
+ __GPIOB_CLK_ENABLE();
+ __GPIOD_CLK_ENABLE();
+ __GPIOE_CLK_ENABLE();
+ __GPIOF_CLK_ENABLE();
+ __GPIOG_CLK_ENABLE();
+ __GPIOH_CLK_ENABLE();
+ __GPIOI_CLK_ENABLE();
+
+ // enable fmc clock
+ __FMC_CLK_ENABLE();
+
+ // structure
+ GPIO_InitTypeDef GPIO_InitStruct;
+
+ // Port B
+ GPIO_InitStruct.Pin = GPIO_PIN_7;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+ // Port D
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15
+ |GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_3|GPIO_PIN_4
+ |GPIO_PIN_5|GPIO_PIN_7;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ /*
+ * When FMC is working with fixed latency, NWAIT pin must not be
+ * configured in AF mode, according to STM32F429 errata.
+ */
+
+ // Port D (GPIO!)
+ GPIO_InitStruct.Pin = GPIO_PIN_6;
+ GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
+ GPIO_InitStruct.Pull = GPIO_PULLUP;
+ HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+ // Port E
+ GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_7
+ |GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+ // Port F
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ |GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_12|GPIO_PIN_13
+ |GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+ // Port G
+ GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3
+ |GPIO_PIN_4|GPIO_PIN_5;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+ // Port H
+ GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11
+ |GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14|GPIO_PIN_15;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
+
+ // Port I
+ GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_0|GPIO_PIN_1
+ |GPIO_PIN_2|GPIO_PIN_3|GPIO_PIN_6|GPIO_PIN_7;
+ GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+ GPIO_InitStruct.Pull = GPIO_NOPULL;
+ GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+ GPIO_InitStruct.Alternate = GPIO_AF12_FMC;
+ HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
+}
+
+
+//------------------------------------------------------------------------------
+void _fmc_init_params(void)
+//------------------------------------------------------------------------------
+{
+ /*
+ * fill internal fields
+ */
+ _fmc_fpga_inst.Instance = FMC_NORSRAM_DEVICE;
+ _fmc_fpga_inst.Extended = FMC_NORSRAM_EXTENDED_DEVICE;
+
+
+ /*
+ * configure fmc interface settings
+ */
+
+ // use the first bank and corresponding chip select
+ _fmc_fpga_inst.Init.NSBank = FMC_NORSRAM_BANK1;
+
+ // data and address buses are separate
+ _fmc_fpga_inst.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE;
+
+ // fpga mimics psram-type memory
+ _fmc_fpga_inst.Init.MemoryType = FMC_MEMORY_TYPE_PSRAM;
+
+ // data bus is 32-bit
+ _fmc_fpga_inst.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_32;
+
+ // read transaction is sync
+ _fmc_fpga_inst.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_ENABLE;
+
+ // this _must_ be configured to high, according to errata, otherwise
+ // the processor may hang after trying to access fpga via fmc
+ _fmc_fpga_inst.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_HIGH;
+
+ // wrap mode is not supported
+ _fmc_fpga_inst.Init.WrapMode = FMC_WRAP_MODE_DISABLE;
+
+ // don't care in fixed latency mode
+ _fmc_fpga_inst.Init.WaitSignalActive = FMC_WAIT_TIMING_DURING_WS;
+
+ // allow write access to fpga
+ _fmc_fpga_inst.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE;
+
+ // use fixed latency mode (ignore wait signal)
+ _fmc_fpga_inst.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE;
+
+ // write and read have same timing
+ _fmc_fpga_inst.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE;
+
+ // don't care in sync mode
+ _fmc_fpga_inst.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE;
+
+ // write transaction is sync
+ _fmc_fpga_inst.Init.WriteBurst = FMC_WRITE_BURST_ENABLE;
+
+ // keep clock always active
+ _fmc_fpga_inst.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ASYNC;
+
+ /*
+ * configure fmc timing parameters
+ */
+ FMC_NORSRAM_TimingTypeDef fmc_timing;
+
+ // don't care in sync mode
+ fmc_timing.AddressSetupTime = 15;
+
+ // don't care in sync mode
+ fmc_timing.AddressHoldTime = 15;
+
+ // don't care in sync mode
+ fmc_timing.DataSetupTime = 255;
+
+ // not needed, since nwait will be polled manually
+ fmc_timing.BusTurnAroundDuration = 0;
+
+ // use smallest allowed divisor for best performance
+ fmc_timing.CLKDivision = 2;
+
+ // stm is too slow to work with min allowed 2-cycle latency
+ fmc_timing.DataLatency = 3;
+
+ // don't care in sync mode
+ fmc_timing.AccessMode = FMC_ACCESS_MODE_A;
+
+ // initialize fmc
+ HAL_SRAM_Init(&_fmc_fpga_inst, &fmc_timing, NULL);
+}
+
+
+//------------------------------------------------------------------------------
+// EOF
+//------------------------------------------------------------------------------
diff --git a/Src/stm-fmc.h b/Src/stm-fmc.h new file mode 100644 index 0000000..05b91be --- /dev/null +++ b/Src/stm-fmc.h @@ -0,0 +1,46 @@ +//------------------------------------------------------------------------------
+// stm-fmc.h
+//------------------------------------------------------------------------------
+
+
+//------------------------------------------------------------------------------
+// Headers
+//------------------------------------------------------------------------------
+#include "stm32f4xx_hal.h"
+
+
+//------------------------------------------------------------------------------
+// External Variables
+//------------------------------------------------------------------------------
+extern SRAM_HandleTypeDef _fmc_fpga_inst;
+
+
+//------------------------------------------------------------------------------
+// Defined Values
+//------------------------------------------------------------------------------
+#define FMC_FPGA_BASE_ADDR 0x60000000
+#define FMC_FPGA_ADDR_MASK 0x00FFFFFC
+#define FMC_FPGA_NWAIT_MAX_POLL_TICKS 10
+
+#define FMC_GPIO_PORT_NWAIT GPIOD
+#define FMC_GPIO_PIN_NWAIT GPIO_PIN_6
+
+#define FMC_NWAIT_IDLE GPIO_PIN_SET
+
+
+//------------------------------------------------------------------------------
+// Prototypes
+//------------------------------------------------------------------------------
+void fmc_init(void);
+
+int fmc_write_32(uint32_t addr, uint32_t *data);
+int fmc_read_32(uint32_t addr, uint32_t *data);
+
+void _fmc_init_gpio(void);
+void _fmc_init_params(void);
+int _fmc_nwait_idle(void);
+
+
+//------------------------------------------------------------------------------
+// EOF
+//------------------------------------------------------------------------------
diff --git a/Src/stm32f4xx_hal_msp.c b/Src/stm32f4xx_hal_msp.c new file mode 100644 index 0000000..a70dcf5 --- /dev/null +++ b/Src/stm32f4xx_hal_msp.c @@ -0,0 +1,107 @@ +/**
+ ******************************************************************************
+ * File Name : stm32f4xx_hal_msp.c
+ * Description : This file provides code for the MSP Initialization
+ * and de-Initialization codes.
+ ******************************************************************************
+ *
+ * COPYRIGHT(c) 2015 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/**
+ * Initializes the Global MSP.
+ */
+void HAL_MspInit(void)
+{
+ /* USER CODE BEGIN MspInit 0 */
+
+ /* USER CODE END MspInit 0 */
+
+ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
+
+ /* System interrupt init*/
+/* SysTick_IRQn interrupt configuration */
+ HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0);
+
+ /* USER CODE BEGIN MspInit 1 */
+
+ /* USER CODE END MspInit 1 */
+}
+
+void HAL_RNG_MspInit(RNG_HandleTypeDef* hrng)
+{
+
+ if(hrng->Instance==RNG)
+ {
+ /* USER CODE BEGIN RNG_MspInit 0 */
+
+ /* USER CODE END RNG_MspInit 0 */
+ /* Peripheral clock enable */
+ __RNG_CLK_ENABLE();
+ /* USER CODE BEGIN RNG_MspInit 1 */
+
+ /* USER CODE END RNG_MspInit 1 */
+ }
+
+}
+
+void HAL_RNG_MspDeInit(RNG_HandleTypeDef* hrng)
+{
+
+ if(hrng->Instance==RNG)
+ {
+ /* USER CODE BEGIN RNG_MspDeInit 0 */
+
+ /* USER CODE END RNG_MspDeInit 0 */
+ /* Peripheral clock disable */
+ __RNG_CLK_DISABLE();
+ }
+ /* USER CODE BEGIN RNG_MspDeInit 1 */
+
+ /* USER CODE END RNG_MspDeInit 1 */
+
+}
+
+
+
+void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram)
+{
+}
+
+
+void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram)
+{
+}
+
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Src/stm32f4xx_it.c b/Src/stm32f4xx_it.c new file mode 100644 index 0000000..6b45801 --- /dev/null +++ b/Src/stm32f4xx_it.c @@ -0,0 +1,73 @@ +/**
+ ******************************************************************************
+ * @file stm32f4xx_it.c
+ * @brief Interrupt Service Routines.
+ ******************************************************************************
+ *
+ * COPYRIGHT(c) 2015 STMicroelectronics
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ * 1. Redistributions of source code must retain the above copyright notice,
+ * this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ ******************************************************************************
+ */
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_hal.h"
+#include "stm32f4xx.h"
+#include "stm32f4xx_it.h"
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* External variables --------------------------------------------------------*/
+
+/******************************************************************************/
+/* Cortex-M4 Processor Interruption and Exception Handlers */
+/******************************************************************************/
+
+/**
+* @brief This function handles System tick timer.
+*/
+void SysTick_Handler(void)
+{
+ /* USER CODE BEGIN SysTick_IRQn 0 */
+
+ /* USER CODE END SysTick_IRQn 0 */
+ HAL_IncTick();
+ HAL_SYSTICK_IRQHandler();
+ /* USER CODE BEGIN SysTick_IRQn 1 */
+
+ /* USER CODE END SysTick_IRQn 1 */
+}
+
+/******************************************************************************/
+/* STM32F4xx Peripheral Interrupt Handlers */
+/* Add here the Interrupt Handlers for the used peripherals. */
+/* For the available peripheral interrupt handler names, */
+/* please refer to the startup file (startup_stm32f4xx.s). */
+/******************************************************************************/
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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