| Mode | Name | Size | |
|---|---|---|---|
| -rw-r--r-- | Makefile | 882 | logplainblame |
| -rw-r--r-- | README.md | 1289 | logplainblame |
| -rw-r--r-- | ecdh_fpga_model.cpp | 8569 | logplainblame |
| -rw-r--r-- | ecdh_fpga_model.h | 6730 | logplainblame |
| -rw-r--r-- | fpga_curve.cpp | 14121 | logplainblame |
| -rw-r--r-- | fpga_curve.h | 3369 | logplainblame |
| -rw-r--r-- | fpga_lowlevel.cpp | 4535 | logplainblame |
| -rw-r--r-- | fpga_lowlevel.h | 3624 | logplainblame |
| -rw-r--r-- | fpga_modular.cpp | 33034 | logplainblame |
| -rw-r--r-- | fpga_modular.h | 4003 | logplainblame |
| -rw-r--r-- | fpga_util.cpp | 3294 | logplainblame |
| -rw-r--r-- | fpga_util.h | 2268 | logplainblame |
| d--------- | test_vectors | 362 | logplain |
 |
index : user/shatov/ecdh_fpga_model | |
| Reference model written to help debug Verilog code | git repositories |
| aboutsummaryrefslogtreecommitdiff |