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authorPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2018-10-15 16:08:25 +0300
committerPavel V. Shatov (Meister) <meisterpaul1@yandex.ru>2018-10-15 16:08:25 +0300
commit71bc54c8a5926fa1bae7acdbb17dd8fdc97fd5d7 (patch)
tree6cf3adcc7c547b61614612a1c200ecaf225148bc /curve25519
parent6f318dcbcbf2777e3e7717a9301833a619944d2a (diff)
Ed25519 microcode parser. Verilog Ed25519 core is microsequenced, it contains a
"worker" module that fetches opcodes from a piece of read-only memory and does either "move" (copy) or "math" (add/subtract/multiply) operation. The C model mimics how this worker unit operates by calling routines that correspond to micro-operations. This parser processes the C model sources and generates a piece of Verilog that is used to initialize the microcode ROM.
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