| Age | Commit message (Expand) | Author |
|---|---|---|
| 2020-09-23 | First attempt at automatic BOM export failed. Turns out some of the components | Pavel V. Shatov (Meister) |
| 2020-09-23 | Finishing cleanup. Fixed schematics DRC errors (mostly missing NC flags on some | Pavel V. Shatov (Meister) |
| 2020-09-23 | Almost finished doing edits to schematics. Added Lattice iCE40 UltraPlus FPGA | Pavel V. Shatov (Meister) |
| 2020-09-23 | Turns out multi-part components were not fully converted and were not | Pavel V. Shatov (Meister) |
| 2020-09-23 | Initial project cleanup | Pavel V. Shatov (Meister) |
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index : user/shatov/alpha_rev04 | |
| Unnamed repository; edit this file 'description' to name the repository. | git repositories |
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