diff options
| author | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2020-09-23 15:11:11 +0300 |
|---|---|---|
| committer | Pavel V. Shatov (Meister) <meisterpaul1@yandex.ru> | 2020-09-23 15:11:11 +0300 |
| commit | 1dee9e20eccc1cf3a6396d88c765b44faebacdd2 (patch) | |
| tree | 1189394c7bbb3bfd232397208b7c8bf5ac8bf108 /KiCAD/rev02_07.sch-bak | |
| parent | a70ee229e036c7ae9ef61af5a73cc32ea6b773ca (diff) | |
Almost finished doing edits to schematics. Added Lattice iCE40 UltraPlus FPGA
along with it's power subsystem and programming circuitry.
Diffstat (limited to 'KiCAD/rev02_07.sch-bak')
| -rw-r--r-- | KiCAD/rev02_07.sch-bak | 14 |
1 files changed, 5 insertions, 9 deletions
diff --git a/KiCAD/rev02_07.sch-bak b/KiCAD/rev02_07.sch-bak index b654fcb..457c0eb 100644 --- a/KiCAD/rev02_07.sch-bak +++ b/KiCAD/rev02_07.sch-bak @@ -3,7 +3,7 @@ EELAYER 30 0 EELAYER END $Descr B 17000 11000 encoding utf-8 -Sheet 9 27 +Sheet 8 27 Title "rev02_07" Date "15 10 2016" Rev "" @@ -75,12 +75,8 @@ Wire Wire Line Wire Wire Line 8700 4700 8700 5500 Wire Wire Line - 7000 4700 6500 4700 -Wire Wire Line 8700 4700 7000 4700 Wire Wire Line - 6500 4700 6200 4700 -Wire Wire Line 8700 5600 8450 5600 Wire Wire Line 8700 5500 8700 5600 @@ -97,11 +93,7 @@ Connection ~ 8700 5600 Connection ~ 7000 4700 Connection ~ 6200 4700 Wire Wire Line - 7000 5500 6500 5500 -Wire Wire Line 7000 5300 7000 5500 -Wire Wire Line - 6500 5500 6270 5500 Text GLabel 6270 5500 0 48 Input ~ 0 KSM_PROM_CS_N Connection ~ 7000 5500 @@ -165,4 +157,8 @@ F 3 "" H 6250 4780 60 0000 C CNN 1 6200 5100 0 1 1 0 $EndComp +Wire Wire Line + 6200 4700 7000 4700 +Wire Wire Line + 6270 5500 7000 5500 $EndSCHEMATC |