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-rw-r--r--KiCAD/Cryptech Alpha.kicad_pcb20839
1 files changed, 9940 insertions, 10899 deletions
diff --git a/KiCAD/Cryptech Alpha.kicad_pcb b/KiCAD/Cryptech Alpha.kicad_pcb
index 1c54c0e..cb40d20 100644
--- a/KiCAD/Cryptech Alpha.kicad_pcb
+++ b/KiCAD/Cryptech Alpha.kicad_pcb
@@ -2,11 +2,11 @@
(general
(thickness 1.6)
- (drawings 6594)
- (tracks 9266)
+ (drawings 3565)
+ (tracks 9265)
(zones 0)
(modules 404)
- (nets 618)
+ (nets 619)
)
(page A4)
@@ -24,14 +24,14 @@
(34 B.Paste user hide)
(35 F.Paste user hide)
(36 B.SilkS user hide)
- (37 F.SilkS user hide)
+ (37 F.SilkS user)
(38 B.Mask user hide)
(39 F.Mask user hide)
(40 Dwgs.User user hide)
(41 Cmts.User user hide)
(42 Eco1.User user hide)
(43 Eco2.User user hide)
- (44 Edge.Cuts user)
+ (44 Edge.Cuts user hide)
(45 Margin user hide)
(46 B.CrtYd user hide)
(47 F.CrtYd user hide)
@@ -73,14 +73,14 @@
(aux_axis_origin 0 0)
(visible_elements 7EFFDF7F)
(pcbplotparams
- (layerselection 0x010fc_ffffffff)
+ (layerselection 0x30000_7fffff80)
(usegerberextensions false)
(usegerberattributes false)
(usegerberadvancedattributes false)
(creategerberjobfile false)
- (excludeedgelayer true)
+ (excludeedgelayer false)
(linewidth 0.100000)
- (plotframeref false)
+ (plotframeref true)
(viasonmask false)
(mode 1)
(useauxorigin false)
@@ -89,12 +89,12 @@
(hpglpendiameter 15.000000)
(psnegative false)
(psa4output false)
- (plotreference false)
+ (plotreference true)
(plotvalue false)
(plotinvisibletext false)
- (padsonsilk false)
+ (padsonsilk true)
(subtractmaskfromsilk false)
- (outputformat 1)
+ (outputformat 4)
(mirror false)
(drillshape 0)
(scaleselection 1)
@@ -719,6 +719,7 @@
(net 615 ICE40_GPIO_FPGA_6)
(net 616 ICE40_GPIO_FPGA_4)
(net 617 "Net-(U11-Pad2)")
+ (net 618 "Net-(S2-PadA1)")
(net_class Default "This is the default net class."
(clearance 0.125)
@@ -935,6 +936,7 @@
(add_net "Net-(R66-Pad1)")
(add_net "Net-(R67-Pad1)")
(add_net "Net-(R8-Pad1)")
+ (add_net "Net-(S2-PadA1)")
(add_net "Net-(U1-Pad9)")
(add_net "Net-(U10-Pad4)")
(add_net "Net-(U11-Pad13)")
@@ -1373,2011 +1375,561 @@
(uvia_drill 0.127)
)
- (module Cryptech_Alpha_Footprints:694106301002 (layer F.Cu) (tedit 60B8CD59) (tstamp 539EEDBF)
- (at 20 18.4)
- (path /57D84708/580240B4)
+ (module Cryptech_Alpha_Footprints:WE-SHC_36103205_NO_CREAM (layer B.Cu) (tedit 60BDE566) (tstamp 539EEDBF)
+ (at 83.82 -87.7454)
+ (path /57D8488D/580240A2)
(attr smd)
- (fp_text reference JP1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference S1 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value "Wurth Power Connector 5.5x2.1mm Barrel" (at 0 0) (layer Cmts.User)
+ (fp_text value 36103205 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 3 thru_hole oval (at 4.8 -10.6 90) (size 4.5 2) (drill oval 3 0.8) (layers *.Cu *.Paste *.Mask)
+ (fp_text user %R (at -5.588 -7.2506) (layer B.Fab)
+ (effects (font (size 5 5) (thickness 0.5)) (justify mirror))
+ )
+ (fp_line (start -11.176 9.652) (end 11.176 9.652) (layer B.Fab) (width 0.1))
+ (fp_line (start 11.176 9.652) (end 11.176 -12.192) (layer B.Fab) (width 0.1))
+ (fp_line (start 11.176 -12.192) (end -11.176 -12.192) (layer B.Fab) (width 0.1))
+ (fp_line (start -11.176 -12.192) (end -11.176 9.652) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 10.2616 -10.3886 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 2 thru_hole oval (at 0 -7.8 90) (size 2 4.5) (drill oval 0.8 3) (layers *.Cu *.Paste *.Mask)
+ (pad 1 smd rect (at -10.25 -10.3886 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -10.25 7.83 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 10.2616 7.83 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 9.1186 -11.5316 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -9.1 -11.5316 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -9.1 8.98 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 9.1186 8.98 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 3.7592 -11.5316 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 3.7592 8.98 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -3.75 8.98 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -3.75 -11.5316 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 10.2616 -5.0292 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 10.2616 2.48 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -10.25 2.48 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -10.25 -5.0292 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 thru_hole oval (at 0 -13.6 90) (size 2 4.5) (drill oval 0.8 3) (layers *.Cu *.Paste *.Mask)
- (net 202 PWR_18V))
- (model wrlshp/PJ-002A.wrl
- (offset (xyz 0.0551179991722107 -0.01193799982070923 6.499999602379799))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 90 180 270))
- )
- (model wrlshp/51D2E761-0F4D.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
- )
)
- (module Cryptech_Alpha_Footprints:694106301002 (layer F.Cu) (tedit 60B8CBD9) (tstamp 539EEDBF)
- (at 62.8 -5.3608)
- (path /57D84FAD/58023F9C)
+ (module Cryptech_Alpha_Footprints:XTAL3215 (layer F.Cu) (tedit 60BDE4F3) (tstamp 539EEDBF)
+ (at 19.275 -45.6)
+ (path /57D84C55/5802401E)
(attr smd)
- (fp_text reference S2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference X1 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value EVQPT9A15 (at 0 0) (layer Cmts.User)
+ (fp_text value ABS07-32.768KHZ-T (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 3 thru_hole oval (at 4.8 -10.6 90) (size 4.5 2) (drill oval 3 0.8) (layers *.Cu *.Paste *.Mask))
- (pad 2 thru_hole oval (at 0 -7.8 90) (size 2 4.5) (drill oval 0.8 3) (layers *.Cu *.Paste *.Mask))
- (pad 1 thru_hole oval (at 0 -13.6 90) (size 2 4.5) (drill oval 0.8 3) (layers *.Cu *.Paste *.Mask))
- (model wrlshp/PJ-002A.wrl
- (offset (xyz 0.0551179991722107 -0.01193799982070923 6.499999602379799))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 90 180 270))
- )
- (model wrlshp/51D2E761-0F4D.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
- )
- )
-
- (module Cryptech_Alpha_Footprints:SOT95P280X100-5N (layer F.Cu) (tedit 5F02E381) (tstamp 5F036F55)
- (at 71.1 -27.7)
- (path /57D8509E/5F0932AD)
- (fp_text reference U12 (at 1.755545 -3.587435) (layer F.SilkS)
- (effects (font (size 1.642764 1.642764) (thickness 0.015)))
- )
- (fp_text value ADP121-AUJZ25R7 (at 13.23165 3.409705) (layer F.Fab)
- (effects (font (size 1.642937 1.642937) (thickness 0.015)))
- )
- (fp_line (start 1.397 -1.1938) (end 0.7874 -1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 -0.7112) (end 1.397 -1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 -0.7112) (end 1.397 -0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 -1.1938) (end 0.7874 -0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 0.7112) (end 0.7874 0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 1.1938) (end 1.397 0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 1.1938) (end 1.397 1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 0.7112) (end 0.7874 1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 1.1938) (end -0.7874 1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 0.7112) (end -1.397 1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 0.7112) (end -1.397 0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 1.1938) (end -0.7874 0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 0.254) (end -0.7874 0.254) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -0.254) (end -1.397 0.254) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 -0.254) (end -1.397 -0.254) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 0.254) (end -0.7874 -0.254) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -0.7112) (end -0.7874 -0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -1.1938) (end -1.397 -0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 -1.1938) (end -1.397 -1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 -0.7112) (end -0.7874 -1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 -1.4478) (end -0.7874 1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 -1.4478) (end -0.7874 -1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 1.4478) (end 0.7874 -1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 1.4478) (end 0.7874 1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 -1.1684) (end 0.8636 -1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 -0.7366) (end 1.397 -1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 -0.7366) (end 1.397 -0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 -1.1684) (end 0.8636 -0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 0.7366) (end 0.8636 0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 1.1684) (end 1.397 0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 1.1684) (end 1.397 1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 0.7366) (end 0.8636 1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 1.1684) (end -0.8636 1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 0.7366) (end -1.397 1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 0.7366) (end -1.397 0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 1.1684) (end -0.8636 0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 0.2286) (end -0.8636 0.2286) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -0.2286) (end -1.397 0.2286) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 -0.2286) (end -1.397 -0.2286) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 0.2286) (end -0.8636 -0.2286) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -0.7366) (end -0.8636 -0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -1.1684) (end -1.397 -0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 -1.1684) (end -1.397 -1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 -0.7366) (end -0.8636 -1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 -1.4478) (end -0.8636 1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 -1.4478) (end -0.8636 -1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 1.4478) (end 0.8636 -1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 1.4478) (end 0.8636 1.4478) (layer F.Fab) (width 0.1))
- (fp_text user Value (at 1.754145 3.406585) (layer F.Fab)
- (effects (font (size 1.641441 1.641441) (thickness 0.015)))
- )
- (fp_text user Name (at 0.71248 -3.587855) (layer Dwgs.User)
- (effects (font (size 1.642953 1.642953) (thickness 0.015)))
- )
- (fp_arc (start 0 -1.4478) (end -0.3048 -1.4478) (angle -180) (layer F.Fab) (width 0.1))
- (fp_arc (start 0 -1.446774) (end -0.1778 -1.2192) (angle -76) (layer F.SilkS) (width 0.1524))
- (fp_arc (start 0 -1.4478) (end -0.3048 -1.4478) (angle -180) (layer F.Fab) (width 0.1))
- (fp_arc (start 0 -1.4478) (end -0.3048 -1.4478) (angle -180) (layer F.SilkS) (width 0.1524))
- (pad 5 smd rect (at 1.2192 -0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
- (net 572 "/Master Key Memory/MKM_VPP"))
- (pad 4 smd rect (at 1.2192 0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
- (net 575 "Net-(U12-Pad4)"))
- (pad 3 smd rect (at -1.2192 0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- (pad 2 smd rect (at -1.2192 0) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 1 smd rect (at -1.2192 -0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- )
-
- (module Cryptech_Alpha_Footprints:SOT95P280X100-5N (layer F.Cu) (tedit 5F02E381) (tstamp 5F036E6C)
- (at 71.1 -30.9)
- (path /57D8509E/5F031C66)
- (fp_text reference U10 (at 1.755545 -3.587435) (layer F.SilkS)
- (effects (font (size 1.642764 1.642764) (thickness 0.015)))
- )
- (fp_text value ADP121-AUJZ12R7 (at 13.23165 3.409705) (layer F.Fab)
- (effects (font (size 1.642937 1.642937) (thickness 0.015)))
- )
- (fp_line (start 1.397 -1.1938) (end 0.7874 -1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 -0.7112) (end 1.397 -1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 -0.7112) (end 1.397 -0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 -1.1938) (end 0.7874 -0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 0.7112) (end 0.7874 0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 1.1938) (end 1.397 0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 1.1938) (end 1.397 1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 0.7112) (end 0.7874 1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 1.1938) (end -0.7874 1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 0.7112) (end -1.397 1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 0.7112) (end -1.397 0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 1.1938) (end -0.7874 0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 0.254) (end -0.7874 0.254) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -0.254) (end -1.397 0.254) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 -0.254) (end -1.397 -0.254) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 0.254) (end -0.7874 -0.254) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -0.7112) (end -0.7874 -0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -1.1938) (end -1.397 -0.7112) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 -1.1938) (end -1.397 -1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 -0.7112) (end -0.7874 -1.1938) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 -1.4478) (end -0.7874 1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 -1.4478) (end -0.7874 -1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start 0.7874 1.4478) (end 0.7874 -1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start -0.7874 1.4478) (end 0.7874 1.4478) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 -1.1684) (end 0.8636 -1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 -0.7366) (end 1.397 -1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 -0.7366) (end 1.397 -0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 -1.1684) (end 0.8636 -0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 0.7366) (end 0.8636 0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start 1.397 1.1684) (end 1.397 0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 1.1684) (end 1.397 1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start 0.8636 0.7366) (end 0.8636 1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 1.1684) (end -0.8636 1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 0.7366) (end -1.397 1.1684) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 0.7366) (end -1.397 0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 1.1684) (end -0.8636 0.7366) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 0.2286) (end -0.8636 0.2286) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -0.2286) (end -1.397 0.2286) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 -0.2286) (end -1.397 -0.2286) (layer F.Fab) (width 0.1))
- (fp_line (start -0.8636 0.2286) (end -0.8636 -0.2286) (layer F.Fab) (width 0.1))
- (fp_line (start -1.397 -0.7366) (end -0.8636 -0.7366) (layer F.Fab) (width 0.1))
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- (xy -2.620173 -1.933271) (xy -2.53664 -1.952468)) (layer B.SilkS) (width 0.01))
+ (fp_line (start -1.27 -2.032) (end 1.27 -2.032) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -2.032) (end 1.27 2.032) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 2.032) (end -1.27 2.032) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 2.032) (end -1.27 -2.032) (layer F.Fab) (width 0.1))
+ (pad P$1 smd rect (at 0 -1.2192 90) (size 1.1176 1.905) (layers F.Cu F.Paste F.Mask)
+ (net 153 "Net-(C70-Pad2)"))
+ (pad P$2 smd rect (at 0 1.2 270) (size 1.1176 1.905) (layers F.Cu F.Paste F.Mask)
+ (net 154 "Net-(C71-Pad2)"))
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F27F142)
- (at 97.8 -23.2 90)
- (path /57D8509E/5F17FA51)
+ (module Cryptech_Alpha_Footprints:USB-MINIB (layer F.Cu) (tedit 60BDE442) (tstamp 539EEDBF)
+ (at 65 14.9)
+ (path /57D84CB3/58023FF3)
(attr smd)
- (fp_text reference R48 (at 0 1.26 90) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
+ (fp_text reference CN1 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 1 3V3_BATT))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 584 ICE40_CDONE))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F27F0BA)
- (at 97.8 -25.2 270)
- (path /57D8509E/5F1B0182)
- (attr smd)
- (fp_text reference R34 (at -0.962 -1.26 90) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 10k (at 0 0 90) (layer Cmts.User)
+ (fp_text value 690-005-299-043 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 585 ICE40_CRESET))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 1 3V3_BATT))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F27F0B4)
- (at 97.8 -17.4 270)
- (path /57D8509E/5F1532CF)
- (attr smd)
- (fp_text reference R33 (at 0.128 -1.26 90) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 3 3) (thickness 0.15)))
)
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 582 "/Master Key Memory/ICE40_SPI_SCK"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (fp_line (start -5.588 -5.08) (end 5.588 -5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start 5.588 -5.08) (end 5.588 5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start 5.588 5.08) (end -5.588 5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.588 5.08) (end -5.588 -5.08) (layer F.Fab) (width 0.1))
+ (pad "" np_thru_hole circle (at -2.2 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
+ (pad "" np_thru_hole circle (at 2.2098 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
+ (pad GND smd rect (at -4.34 -3.5052) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
+ (pad VBUS smd rect (at -1.6 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 144 FT_VREGIN))
+ (pad D- smd rect (at -0.8 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 221 "/User USB UART/D1_N"))
+ (pad D+ smd rect (at 0 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 222 "/User USB UART/D1_P"))
+ (pad ID smd rect (at 0.8 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 266 "Net-(CN1-PadID)"))
+ (pad GND smd rect (at 1.6002 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad GND smd rect (at -4.34 2) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad GND smd rect (at 4.36 -3.5052) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad GND smd rect (at 4.36 2) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model wrlshp/c-1734035-2-e-3d.wrl
+ (offset (xyz 0.02539999961853028 -5.009133924770355 2.000001049962997))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F27F09A)
- (at 91.5 -31 180)
- (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
- (tags resistor)
- (path /57D8509E/5F0CB134)
- (attr smd)
- (fp_text reference R30 (at 3.246 0.984) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_text value 100 (at 0 1.65) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
- (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
- (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
- (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
- (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
- (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
- (fp_text user %R (at 0 0) (layer F.Fab)
- (effects (font (size 0.5 0.5) (thickness 0.08)))
- )
- (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
- (net 579 ARM_SPI3_CS_N))
- (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
- (net 581 "/Master Key Memory/ICE40_SPI_SS"))
- (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F27F089)
- (at 91.5 -29 180)
- (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
- (tags resistor)
- (path /57D8509E/5F0CB078)
- (attr smd)
- (fp_text reference R29 (at 3.246 4.484) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_text value 100 (at 0 1.65) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
- (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
- (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
- (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
- (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
- (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
- (fp_text user %R (at 0 0) (layer F.Fab)
- (effects (font (size 0.5 0.5) (thickness 0.08)))
- )
- (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
- (net 578 ARM_SPI3_SCK))
- (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
- (net 582 "/Master Key Memory/ICE40_SPI_SCK"))
- (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F27F078)
- (at 91.5 -33 180)
- (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
- (tags resistor)
- (path /57D8509E/5F0CAE7D)
- (attr smd)
- (fp_text reference R28 (at 3.246 1.984) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_text value 100 (at 0 1.65) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
- (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
- (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
- (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
- (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
- (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
- (fp_text user %R (at 0 0) (layer F.Fab)
- (effects (font (size 0.5 0.5) (thickness 0.08)))
- )
- (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
- (net 576 ARM_SPI3_MOSI))
- (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
- (net 580 "/Master Key Memory/ICE40_SPI_SI"))
- (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F27F053)
- (at 91.5 -35 180)
- (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
- (tags resistor)
- (path /57D8509E/5F0C809C)
- (attr smd)
- (fp_text reference R25 (at 3.246 1.484) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_text value 100 (at 0 1.65) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
- (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
- (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
- (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
- (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
- (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
- (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
- (fp_text user %R (at 0 0) (layer F.Fab)
- (effects (font (size 0.5 0.5) (thickness 0.08)))
+ (rotate (xyz 270 360 360))
)
- (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
- (net 577 ARM_SPI3_MISO))
- (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
- (net 583 "/Master Key Memory/ICE40_SPI_SO"))
- (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
+ (model wrlshp/23D50C2B-5C98.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F27EEA2)
- (at 95.8 -10.6)
- (path /57D8509E/5F17C1AC)
+ (module Cryptech_Alpha_Footprints:USB-MINIB (layer F.Cu) (tedit 60BDE442) (tstamp 539EEDBF)
+ (at 85 14.9)
+ (path /57D84E30/58023FBD)
(attr smd)
- (fp_text reference LED5 (at -1.312 3.488 270) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (fp_text reference CN2 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 584 ICE40_CDONE))
- (model wrlshp/A9F03225-78F3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
- )
- )
-
- (module Cryptech_Alpha_Footprints:PLS-2 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F27EE3C)
- (at 75 -19.8 180)
- (path /57D84FAD/5F27A891)
- (attr smd)
- (fp_text reference JP3 (at 0 0) (layer F.SilkS) hide
+ (fp_text value 690-005-299-043 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLS-2 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 3 3) (thickness 0.15)))
)
- (pad 2 thru_hole circle (at 1.27 0 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 594 ICE40_JUMPER))
- (pad 1 thru_hole rect (at -1.27 0 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (fp_line (start -5.588 -5.08) (end 5.588 -5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start 5.588 -5.08) (end 5.588 5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start 5.588 5.08) (end -5.588 5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.588 5.08) (end -5.588 -5.08) (layer F.Fab) (width 0.1))
+ (pad "" np_thru_hole circle (at -2.2 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
+ (pad "" np_thru_hole circle (at 2.2098 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
+ (pad GND smd rect (at -4.34 -3.5052) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (model "wrlshp/User Library-Header1x2.wrl"
- (offset (xyz 5.675121914768218 11.80693582267761 -6.799998997874261))
+ (pad VBUS smd rect (at -1.6 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 137 FT_MGMT_VREGIN))
+ (pad D- smd rect (at -0.8 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 223 "/MGMT USB UART/DM_N"))
+ (pad D+ smd rect (at 0 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 224 "/MGMT USB UART/DM_P"))
+ (pad ID smd rect (at 0.8 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 267 "Net-(CN2-PadID)"))
+ (pad GND smd rect (at 1.6002 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad GND smd rect (at -4.34 2) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad GND smd rect (at 4.36 -3.5052) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad GND smd rect (at 4.36 2) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model wrlshp/c-1734035-2-e-3d.wrl
+ (offset (xyz 0.02539999961853028 -5.009133924770355 2.000001049962997))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (rotate (xyz 270 360 360))
)
- (model wrlshp/3416A7AC-A52A.wrl
+ (model wrlshp/23D50C2B-5C98.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F27EC88)
- (at 93.2 -33 270)
- (path /57D8509E/5F112F44)
+ (module Cryptech_Alpha_Footprints:TSSOP50P1180X120-86N (layer F.Cu) (tedit 60BDE398) (tstamp 539EEDBF)
+ (at 86.1704 -49.8264 180)
+ (path /57D84B22/58024046)
(attr smd)
- (fp_text reference C228 (at 0.234 2.776 90) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 0.1uF (at 0 0 270) (layer Cmts.User)
+ (fp_text reference U5 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 1 3V3_BATT))
- (pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F27EC82)
- (at 94.2 -33 90)
- (path /57D8509E/5F112F4E)
- (attr smd)
- (fp_text reference C227 (at -0.234 -2.506 90) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 0.01uF (at 0 0 270) (layer Cmts.User)
+ (fp_text value IS45S32160F-*** (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 1 3V3_BATT))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5F286543)
- (at 96 -34)
- (descr "Through hole straight pin header, 1x08, 2.54mm pitch, single row")
- (tags "Through hole pin header THT 1x08 2.54mm single row")
- (path /57D8509E/5F109687)
- (fp_text reference J5 (at -2.02 -0.29 270) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_text value PLS-8 (at 0 20.11) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
- )
- (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
- (fp_line (start 1.27 -1.27) (end 1.27 19.05) (layer F.Fab) (width 0.1))
- (fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.Fab) (width 0.1))
- (fp_line (start -1.27 19.05) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
- (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
- (fp_line (start -1.33 19.11) (end 1.33 19.11) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.33 1.27) (end -1.33 19.11) (layer F.SilkS) (width 0.12))
- (fp_line (start 1.33 1.27) (end 1.33 19.11) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
- (fp_line (start -1.8 -1.8) (end -1.8 19.55) (layer F.CrtYd) (width 0.05))
- (fp_line (start -1.8 19.55) (end 1.8 19.55) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.8 19.55) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
- (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
- (fp_text user %R (at 0 8.89 90) (layer F.Fab)
- (effects (font (size 1 1) (thickness 0.15)))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 5 5) (thickness 0.5)))
)
- (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 582 "/Master Key Memory/ICE40_SPI_SCK"))
- (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (fp_line (start -6.604 -10.922) (end -6.604 10.922) (layer F.Fab) (width 0.1))
+ (fp_line (start -6.604 10.922) (end 6.604 10.922) (layer F.Fab) (width 0.1))
+ (fp_line (start 6.604 10.922) (end 6.604 -10.922) (layer F.Fab) (width 0.1))
+ (fp_line (start 6.604 -10.922) (end -6.604 -10.922) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy -5.08 -10.16) (xy -6.604 -10.16) (xy -6.604 -10.922) (xy -5.08 -10.922)) (layer F.Fab) (width 0.1))
+ (pad 1 smd oval (at -5.75 -10.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd oval (at -5.75 -10 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 41 FMC_D0))
+ (pad 3 smd oval (at -5.75 -9.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 4 smd oval (at -5.75 -9 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 42 FMC_D1))
+ (pad 5 smd oval (at -5.75 -8.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 43 FMC_D2))
+ (pad 6 smd oval (at -5.75 -8 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 584 ICE40_CDONE))
- (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 585 ICE40_CRESET))
- (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 581 "/Master Key Memory/ICE40_SPI_SS"))
- (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 580 "/Master Key Memory/ICE40_SPI_SI"))
- (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 583 "/Master Key Memory/ICE40_SPI_SO"))
- (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 1 3V3_BATT))
- (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F048F99)
- (at 76.8 -29)
- (path /57D8509E/5F14E9EA)
- (attr smd)
- (fp_text reference C226 (at 0 -4.572) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 7 smd oval (at -5.75 -7.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 44 FMC_D3))
+ (pad 8 smd oval (at -5.75 -7 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 45 FMC_D4))
+ (pad 9 smd oval (at -5.75 -6.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
+ (pad 10 smd oval (at -5.75 -6 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 46 FMC_D5))
+ (pad 11 smd oval (at -5.75 -5.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 47 FMC_D6))
+ (pad 12 smd oval (at -5.75 -5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F048F93)
- (at 76.8 -28 180)
- (path /57D8509E/5F154973)
- (attr smd)
- (fp_text reference C225 (at 0 4.318) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.01uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 13 smd oval (at -5.75 -4.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 48 FMC_D7))
+ (pad 14 smd oval (at -5.75 -4 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
+ (pad 15 smd oval (at -5.75 -3.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 16 smd oval (at -5.75 -3 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 73 FMC_NBL0))
+ (pad 17 smd oval (at -5.75 -2.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 89 FMC_SDNWE))
+ (pad 18 smd oval (at -5.75 -2 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 85 FMC_SDNCAS))
+ (pad 19 smd oval (at -5.75 -1.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 88 FMC_SDNRAS))
+ (pad 20 smd oval (at -5.75 -1 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 86 FMC_SDNE0))
+ (pad 21 smd oval (at -5.75 -0.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 25 FMC_A11))
+ (pad 22 smd oval (at -5.75 0 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 28 FMC_A14))
+ (pad 23 smd oval (at -5.75 0.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 29 FMC_A15))
+ (pad 24 smd oval (at -5.75 1 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 24 FMC_A10))
+ (pad 25 smd oval (at -5.75 1.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 14 FMC_A0))
+ (pad 26 smd oval (at -5.75 2 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 15 FMC_A1))
+ (pad 27 smd oval (at -5.75 2.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 16 FMC_A2))
+ (pad 28 smd oval (at -5.75 3 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 75 FMC_NBL2))
+ (pad 29 smd oval (at -5.75 3.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 30 smd oval (at -5.75 4 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
+ (pad 31 smd oval (at -5.75 4.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 57 FMC_D16))
+ (pad 32 smd oval (at -5.75 5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F048F8D)
- (at 81 -33.2 270)
- (path /57D8509E/5F149FB8)
- (attr smd)
- (fp_text reference C224 (at -1.524 -2.312 90) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- (pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 33 smd oval (at -5.75 5.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 58 FMC_D17))
+ (pad 34 smd oval (at -5.75 6 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 59 FMC_D18))
+ (pad 35 smd oval (at -5.75 6.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 36 smd oval (at -5.75 7 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 60 FMC_D19))
+ (pad 37 smd oval (at -5.75 7.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 61 FMC_D20))
+ (pad 38 smd oval (at -5.75 8 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F048F87)
- (at 83.2 -28 180)
- (path /57D8509E/5F13FBA7)
- (attr smd)
- (fp_text reference C223 (at 2.936 -0.314) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- (pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 39 smd oval (at -5.75 8.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 62 FMC_D21))
+ (pad 40 smd oval (at -5.75 9 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 63 FMC_D22))
+ (pad 41 smd oval (at -5.75 9.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 42 smd oval (at -5.75 10 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 64 FMC_D23))
+ (pad 43 smd oval (at -5.75 10.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 86 smd oval (at 5.75 -10.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F048F81)
- (at 82 -33.2 90)
- (path /57D8509E/5F15426E)
- (attr smd)
- (fp_text reference C222 (at 1.524 2.582 90) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.01uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 85 smd oval (at 5.75 -10 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 56 FMC_D15))
+ (pad 84 smd oval (at 5.75 -9.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F048F7B)
- (at 83.2 -29)
- (path /57D8509E/5F153C00)
- (attr smd)
- (fp_text reference C221 (at -2.936 0.044) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.01uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 83 smd oval (at 5.75 -9 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 55 FMC_D14))
+ (pad 82 smd oval (at 5.75 -8.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 54 FMC_D13))
+ (pad 81 smd oval (at 5.75 -8 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 80 smd oval (at 5.75 -7.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 53 FMC_D12))
+ (pad 79 smd oval (at 5.75 -7 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 52 FMC_D11))
+ (pad 78 smd oval (at 5.75 -6.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F045642)
- (at 83.2 -30)
- (path /57D8509E/5F11DC09)
- (attr smd)
- (fp_text reference C220 (at -2.936 -0.226) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.01uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 77 smd oval (at 5.75 -6 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 51 FMC_D10))
+ (pad 76 smd oval (at 5.75 -5.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 50 FMC_D9))
+ (pad 75 smd oval (at 5.75 -5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 74 smd oval (at 5.75 -4.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 49 FMC_D8))
+ (pad 73 smd oval (at 5.75 -4 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
+ (pad 72 smd oval (at 5.75 -3.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 571 "/Master Key Memory/MKM_VCC"))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F04563C)
- (at 76.8 -31)
- (path /57D8509E/5F11E1B4)
- (attr smd)
- (fp_text reference C219 (at 0 -5.068) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 571 "/Master Key Memory/MKM_VCC"))
- (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 71 smd oval (at 5.75 -3 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 74 FMC_NBL1))
+ (pad 70 smd oval (at 5.75 -2.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
+ (pad 69 smd oval (at 5.75 -2 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 26 FMC_A12))
+ (pad 68 smd oval (at 5.75 -1.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 84 FMC_SDCLK))
+ (pad 67 smd oval (at 5.75 -1 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 82 FMC_SDCKE0))
+ (pad 66 smd oval (at 5.75 -0.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 23 FMC_A9))
+ (pad 65 smd oval (at 5.75 0 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 22 FMC_A8))
+ (pad 64 smd oval (at 5.75 0.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 21 FMC_A7))
+ (pad 63 smd oval (at 5.75 1 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 20 FMC_A6))
+ (pad 62 smd oval (at 5.75 1.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 19 FMC_A5))
+ (pad 61 smd oval (at 5.75 2 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 18 FMC_A4))
+ (pad 60 smd oval (at 5.75 2.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 17 FMC_A3))
+ (pad 59 smd oval (at 5.75 3 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 76 FMC_NBL3))
+ (pad 58 smd oval (at 5.75 3.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
+ (pad 57 smd oval (at 5.75 4 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
+ (pad 56 smd oval (at 5.75 4.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 72 FMC_D31))
+ (pad 55 smd oval (at 5.75 5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 54 smd oval (at 5.75 5.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 71 FMC_D30))
+ (pad 53 smd oval (at 5.75 6 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 70 FMC_D29))
+ (pad 52 smd oval (at 5.75 6.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 51 smd oval (at 5.75 7 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 69 FMC_D28))
+ (pad 50 smd oval (at 5.75 7.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 68 FMC_D27))
+ (pad 49 smd oval (at 5.75 8 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 48 smd oval (at 5.75 8.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 67 FMC_D26))
+ (pad 47 smd oval (at 5.75 9 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 66 FMC_D25))
+ (pad 46 smd oval (at 5.75 9.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 45 smd oval (at 5.75 10 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 65 FMC_D24))
+ (pad 44 smd oval (at 5.75 10.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model wrlshp/D87FE1D2-D8B7.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F0366A7)
- (at 85.7 -30.3 180)
- (path /57D8509E/5F057AAC)
+ (module Cryptech_Alpha_Footprints:TSSOP50P1180X120-86N (layer B.Cu) (tedit 60BDE398) (tstamp 539EEDBF)
+ (at 80.6704 -49.8264)
+ (path /57D84B22/58024042)
(attr smd)
- (fp_text reference R24 (at -0.152 -1.344) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 100 (at 0 0) (layer Cmts.User)
+ (fp_text reference U6 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 571 "/Master Key Memory/MKM_VCC"))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 573 "/Master Key Memory/MKM_VCC_PLL"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F036329)
- (at 76.8 -30 180)
- (path /57D8509E/5F0798C6)
- (attr smd)
- (fp_text reference C218 (at 0 4.826) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.01uF (at 0 0) (layer Cmts.User)
+ (fp_text value IS45S32160F-*** (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 571 "/Master Key Memory/MKM_VCC"))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F036323)
- (at 83.2 -31 180)
- (path /57D8509E/5F077BE8)
- (attr smd)
- (fp_text reference C217 (at 2.936 0.496) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text user %R (at 0 0 -90) (layer B.Fab)
+ (effects (font (size 5 5) (thickness 0.5)) (justify mirror))
)
- (pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 571 "/Master Key Memory/MKM_VCC"))
- (pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (fp_line (start -6.604 10.922) (end -6.604 -10.922) (layer B.Fab) (width 0.1))
+ (fp_line (start -6.604 -10.922) (end 6.604 -10.922) (layer B.Fab) (width 0.1))
+ (fp_line (start 6.604 -10.922) (end 6.604 10.922) (layer B.Fab) (width 0.1))
+ (fp_line (start 6.604 10.922) (end -6.604 10.922) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy -5.08 10.16) (xy -6.604 10.16) (xy -6.604 10.922) (xy -5.08 10.922)) (layer B.Fab) (width 0.1))
+ (pad 1 smd oval (at -5.75 10.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd oval (at -5.75 10 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 41 FMC_D0))
+ (pad 3 smd oval (at -5.75 9.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 4 smd oval (at -5.75 9 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 42 FMC_D1))
+ (pad 5 smd oval (at -5.75 8.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 43 FMC_D2))
+ (pad 6 smd oval (at -5.75 8 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F03631D)
- (at 86.7 -30.4)
- (path /57D8509E/5F05C031)
- (attr smd)
- (fp_text reference C216 (at 1.692 0.936 90) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 573 "/Master Key Memory/MKM_VCC_PLL"))
- (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 7 smd oval (at -5.75 7.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 44 FMC_D3))
+ (pad 8 smd oval (at -5.75 7 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 45 FMC_D4))
+ (pad 9 smd oval (at -5.75 6.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 10 smd oval (at -5.75 6 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 46 FMC_D5))
+ (pad 11 smd oval (at -5.75 5.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 47 FMC_D6))
+ (pad 12 smd oval (at -5.75 5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/ECAF1ED8-FCC0.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 5F035EDF)
- (at 86.2 -27.5 270)
- (path /57D8509E/5F05B071)
- (attr smd)
- (fp_text reference C107 (at 1.846 -1.43 90) (layer F.SilkS)
- (effects (font (size 1 1) (thickness 0.1)))
- )
- (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 573 "/Master Key Memory/MKM_VCC_PLL"))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 13 smd oval (at -5.75 4.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 48 FMC_D7))
+ (pad 14 smd oval (at -5.75 4 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 15 smd oval (at -5.75 3.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 16 smd oval (at -5.75 3 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 73 FMC_NBL0))
+ (pad 17 smd oval (at -5.75 2.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 89 FMC_SDNWE))
+ (pad 18 smd oval (at -5.75 2 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 85 FMC_SDNCAS))
+ (pad 19 smd oval (at -5.75 1.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 88 FMC_SDNRAS))
+ (pad 20 smd oval (at -5.75 1 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 87 FMC_SDNE1))
+ (pad 21 smd oval (at -5.75 0.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 25 FMC_A11))
+ (pad 22 smd oval (at -5.75 0 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 28 FMC_A14))
+ (pad 23 smd oval (at -5.75 -0.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 29 FMC_A15))
+ (pad 24 smd oval (at -5.75 -1 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 24 FMC_A10))
+ (pad 25 smd oval (at -5.75 -1.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 14 FMC_A0))
+ (pad 26 smd oval (at -5.75 -2 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 15 FMC_A1))
+ (pad 27 smd oval (at -5.75 -2.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 16 FMC_A2))
+ (pad 28 smd oval (at -5.75 -3 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 75 FMC_NBL2))
+ (pad 29 smd oval (at -5.75 -3.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 30 smd oval (at -5.75 -4 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 31 smd oval (at -5.75 -4.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 57 FMC_D16))
+ (pad 32 smd oval (at -5.75 -5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F035ED9)
- (at 72.3 -28.2 180)
- (path /57D8509E/5F090460)
- (attr smd)
- (fp_text reference C106 (at -1.36 -0.006 90) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 2 smd rect (at 0 -0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (pad 33 smd oval (at -5.75 -5.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 58 FMC_D17))
+ (pad 34 smd oval (at -5.75 -6 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 59 FMC_D18))
+ (pad 35 smd oval (at -5.75 -6.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 36 smd oval (at -5.75 -7 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 60 FMC_D19))
+ (pad 37 smd oval (at -5.75 -7.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 61 FMC_D20))
+ (pad 38 smd oval (at -5.75 -8 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
- (net 572 "/Master Key Memory/MKM_VPP"))
- (model "wrlshp/SW3dPS-0603 SMD Capacitor.wrl"
- (at (xyz 0 0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
- )
- (model wrlshp/175C1D2E-5B2D.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F035EC9)
- (at 72.3 -31.1 180)
- (path /57D8509E/5F043BA5)
- (attr smd)
- (fp_text reference C104 (at -1.36 1.158 90) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 2 smd rect (at 0 -0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (pad 39 smd oval (at -5.75 -8.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 62 FMC_D21))
+ (pad 40 smd oval (at -5.75 -9 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 63 FMC_D22))
+ (pad 41 smd oval (at -5.75 -9.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 42 smd oval (at -5.75 -10 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 64 FMC_D23))
+ (pad 43 smd oval (at -5.75 -10.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 86 smd oval (at 5.75 10.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
- (net 571 "/Master Key Memory/MKM_VCC"))
- (model "wrlshp/SW3dPS-0603 SMD Capacitor.wrl"
- (at (xyz 0 0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
- )
- (model wrlshp/175C1D2E-5B2D.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F035EC3)
- (at 69.9 -28.2 180)
- (path /57D8509E/5F09046A)
- (attr smd)
- (fp_text reference C103 (at 1.32 0.248 270) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 2 smd rect (at 0 -0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (pad 85 smd oval (at 5.75 10 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 56 FMC_D15))
+ (pad 84 smd oval (at 5.75 9.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
- (net 1 3V3_BATT))
- (model "wrlshp/SW3dPS-0603 SMD Capacitor.wrl"
- (at (xyz 0 0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
- )
- (model wrlshp/175C1D2E-5B2D.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 5F035EBD)
- (at 69.9 -31.3 180)
- (path /57D8509E/5F043CFB)
- (attr smd)
- (fp_text reference C102 (at 1.32 0.958 270) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
- )
- (fp_text value 1uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 2 smd rect (at 0 -0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (pad 83 smd oval (at 5.75 9 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 55 FMC_D14))
+ (pad 82 smd oval (at 5.75 8.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 54 FMC_D13))
+ (pad 81 smd oval (at 5.75 8 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 80 smd oval (at 5.75 7.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 53 FMC_D12))
+ (pad 79 smd oval (at 5.75 7 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 52 FMC_D11))
+ (pad 78 smd oval (at 5.75 6.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
- (net 1 3V3_BATT))
- (model "wrlshp/SW3dPS-0603 SMD Capacitor.wrl"
- (at (xyz 0 0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
- )
- (model wrlshp/175C1D2E-5B2D.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
- )
- )
-
- (module Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm (layer B.Cu) (tedit 5DC5F6A5) (tstamp 5F0C4CB2)
- (at 80 -30)
- (descr "QFN, 48 Pin (http://www.st.com/resource/en/datasheet/stm32f042k6.pdf#page=94), generated with kicad-footprint-generator ipc_noLead_generator.py")
- (tags "QFN NoLead")
- (path /57D8509E/5EF0D127)
- (attr smd)
- (fp_text reference U11 (at 0 4.82) (layer B.SilkS)
- (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
- )
- (fp_text value ICE40UP5K-SG48I (at 0 -4.82) (layer B.Fab)
- (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
- )
- (fp_line (start 4.12 4.12) (end -4.12 4.12) (layer B.CrtYd) (width 0.05))
- (fp_line (start 4.12 -4.12) (end 4.12 4.12) (layer B.CrtYd) (width 0.05))
- (fp_line (start -4.12 -4.12) (end 4.12 -4.12) (layer B.CrtYd) (width 0.05))
- (fp_line (start -4.12 4.12) (end -4.12 -4.12) (layer B.CrtYd) (width 0.05))
- (fp_line (start -3.5 2.5) (end -2.5 3.5) (layer B.Fab) (width 0.1))
- (fp_line (start -3.5 -3.5) (end -3.5 2.5) (layer B.Fab) (width 0.1))
- (fp_line (start 3.5 -3.5) (end -3.5 -3.5) (layer B.Fab) (width 0.1))
- (fp_line (start 3.5 3.5) (end 3.5 -3.5) (layer B.Fab) (width 0.1))
- (fp_line (start -2.5 3.5) (end 3.5 3.5) (layer B.Fab) (width 0.1))
- (fp_line (start -3.135 3.61) (end -3.61 3.61) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.61 -3.61) (end 3.61 -3.135) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.135 -3.61) (end 3.61 -3.61) (layer B.SilkS) (width 0.12))
- (fp_line (start -3.61 -3.61) (end -3.61 -3.135) (layer B.SilkS) (width 0.12))
- (fp_line (start -3.135 -3.61) (end -3.61 -3.61) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.61 3.61) (end 3.61 3.135) (layer B.SilkS) (width 0.12))
- (fp_line (start 3.135 3.61) (end 3.61 3.61) (layer B.SilkS) (width 0.12))
- (fp_text user %R (at 0 0) (layer B.Fab)
- (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
- )
- (pad "" smd roundrect (at 2.1 -2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at 2.1 -0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at 2.1 0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at 2.1 2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at 0.7 -2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at 0.7 -0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at 0.7 0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at 0.7 2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at -0.7 -2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at -0.7 -0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at -0.7 0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at -0.7 2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at -2.1 -2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at -2.1 -0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at -2.1 0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad "" smd roundrect (at -2.1 2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
- (pad 49 smd rect (at 0 0) (size 5.6 5.6) (layers B.Cu B.Mask)
+ (pad 77 smd oval (at 5.75 6 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 51 FMC_D10))
+ (pad 76 smd oval (at 5.75 5.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 50 FMC_D9))
+ (pad 75 smd oval (at 5.75 5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 74 smd oval (at 5.75 4.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 49 FMC_D8))
+ (pad 73 smd oval (at 5.75 4 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 72 smd oval (at 5.75 3.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 48 smd roundrect (at -2.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 605 ICE40_LED2))
- (pad 47 smd roundrect (at -2.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 603 ICE40_LED3))
- (pad 46 smd roundrect (at -1.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 607 ICE40_LED4))
- (pad 45 smd roundrect (at -1.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 606 ICE40_LED1))
- (pad 44 smd roundrect (at -0.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 604 ICE40_PANIC))
- (pad 43 smd roundrect (at -0.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 602 ICE40_GPIO_0))
- (pad 42 smd roundrect (at 0.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 595 ICE40_GPIO_1))
- (pad 41 smd roundrect (at 0.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 601 ICE40_GPIO_2))
- (pad 40 smd roundrect (at 1.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 596 ICE40_GPIO_7))
- (pad 39 smd roundrect (at 1.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 597 ICE40_GPIO_6))
- (pad 38 smd roundrect (at 2.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 598 ICE40_GPIO_5))
- (pad 37 smd roundrect (at 2.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 599 ICE40_GPIO_4))
- (pad 36 smd roundrect (at 3.4375 2.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 600 ICE40_GPIO_3))
- (pad 35 smd roundrect (at 3.4375 2.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 613 ICE40_GPIO_FPGA_7))
- (pad 34 smd roundrect (at 3.4375 1.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 615 ICE40_GPIO_FPGA_6))
- (pad 33 smd roundrect (at 3.4375 1.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 1 3V3_BATT))
- (pad 32 smd roundrect (at 3.4375 0.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 614 ICE40_GPIO_FPGA_5))
- (pad 31 smd roundrect (at 3.4375 0.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 616 ICE40_GPIO_FPGA_4))
- (pad 30 smd roundrect (at 3.4375 -0.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 571 "/Master Key Memory/MKM_VCC"))
- (pad 29 smd roundrect (at 3.4375 -0.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 573 "/Master Key Memory/MKM_VCC_PLL"))
- (pad 28 smd roundrect (at 3.4375 -1.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 348 "Net-(U11-Pad28)"))
- (pad 27 smd roundrect (at 3.4375 -1.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 610 ICE40_FPGA_MOSI))
- (pad 26 smd roundrect (at 3.4375 -2.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 608 ICE40_FPGA_MISO))
- (pad 25 smd roundrect (at 3.4375 -2.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 609 ICE40_FPGA_CS_N))
- (pad 24 smd roundrect (at 2.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 572 "/Master Key Memory/MKM_VPP"))
- (pad 23 smd roundrect (at 2.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 611 ICE40_FPGA_SCK))
- (pad 22 smd roundrect (at 1.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 1 3V3_BATT))
- (pad 21 smd roundrect (at 1.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 590 ICE40_GPIO_FPGA_0))
- (pad 20 smd roundrect (at 0.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 591 ICE40_GPIO_FPGA_1))
- (pad 19 smd roundrect (at 0.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 593 ICE40_GPIO_FPGA_2))
- (pad 18 smd roundrect (at -0.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 592 ICE40_GPIO_FPGA_3))
- (pad 17 smd roundrect (at -0.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 580 "/Master Key Memory/ICE40_SPI_SI"))
- (pad 16 smd roundrect (at -1.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 581 "/Master Key Memory/ICE40_SPI_SS"))
- (pad 15 smd roundrect (at -1.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 582 "/Master Key Memory/ICE40_SPI_SCK"))
- (pad 14 smd roundrect (at -2.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 583 "/Master Key Memory/ICE40_SPI_SO"))
- (pad 13 smd roundrect (at -2.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 349 "Net-(U11-Pad13)"))
- (pad 12 smd roundrect (at -3.4375 -2.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 587 ICE40_GPIO_ARM_1))
- (pad 11 smd roundrect (at -3.4375 -2.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 588 ICE40_GPIO_ARM_2))
- (pad 10 smd roundrect (at -3.4375 -1.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 586 ICE40_GPIO_ARM_0))
- (pad 9 smd roundrect (at -3.4375 -1.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 589 ICE40_GPIO_ARM_3))
- (pad 8 smd roundrect (at -3.4375 -0.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 585 ICE40_CRESET))
- (pad 7 smd roundrect (at -3.4375 -0.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 584 ICE40_CDONE))
- (pad 6 smd roundrect (at -3.4375 0.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 350 "Net-(U11-Pad6)"))
- (pad 5 smd roundrect (at -3.4375 0.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 571 "/Master Key Memory/MKM_VCC"))
- (pad 4 smd roundrect (at -3.4375 1.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 570 "Net-(U11-Pad4)"))
- (pad 3 smd roundrect (at -3.4375 1.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 594 ICE40_JUMPER))
- (pad 2 smd roundrect (at -3.4375 2.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 617 "Net-(U11-Pad2)"))
- (pad 1 smd roundrect (at -3.4375 2.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
- (net 1 3V3_BATT))
- (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm.wrl
+ (pad 71 smd oval (at 5.75 3 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 74 FMC_NBL1))
+ (pad 70 smd oval (at 5.75 2.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 69 smd oval (at 5.75 2 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 26 FMC_A12))
+ (pad 68 smd oval (at 5.75 1.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 84 FMC_SDCLK))
+ (pad 67 smd oval (at 5.75 1 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 83 FMC_SDCKE1))
+ (pad 66 smd oval (at 5.75 0.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 23 FMC_A9))
+ (pad 65 smd oval (at 5.75 0 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 22 FMC_A8))
+ (pad 64 smd oval (at 5.75 -0.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 21 FMC_A7))
+ (pad 63 smd oval (at 5.75 -1 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 20 FMC_A6))
+ (pad 62 smd oval (at 5.75 -1.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 19 FMC_A5))
+ (pad 61 smd oval (at 5.75 -2 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 18 FMC_A4))
+ (pad 60 smd oval (at 5.75 -2.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 17 FMC_A3))
+ (pad 59 smd oval (at 5.75 -3 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 76 FMC_NBL3))
+ (pad 58 smd oval (at 5.75 -3.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 57 smd oval (at 5.75 -4 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
+ (pad 56 smd oval (at 5.75 -4.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 72 FMC_D31))
+ (pad 55 smd oval (at 5.75 -5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 54 smd oval (at 5.75 -5.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 71 FMC_D30))
+ (pad 53 smd oval (at 5.75 -6 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 70 FMC_D29))
+ (pad 52 smd oval (at 5.75 -6.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 51 smd oval (at 5.75 -7 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 69 FMC_D28))
+ (pad 50 smd oval (at 5.75 -7.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 68 FMC_D27))
+ (pad 49 smd oval (at 5.75 -8 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 48 smd oval (at 5.75 -8.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 67 FMC_D26))
+ (pad 47 smd oval (at 5.75 -9 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 66 FMC_D25))
+ (pad 46 smd oval (at 5.75 -9.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 45 smd oval (at 5.75 -10 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 65 FMC_D24))
+ (pad 44 smd oval (at 5.75 -10.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (model wrlshp/D87FE1D2-D8B7.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:TSQFP50P3000X3000X160-208N (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:TSQFP50P3000X3000X160-208N (layer B.Cu) (tedit 60BDE330) (tstamp 539EEDBF)
(at 48.6918 -32.6136)
(path /57D84936/58024086)
(attr smd)
@@ -3387,6 +1939,14 @@
(fp_text value STM32F429BIT6 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 10 10) (thickness 0.5)) (justify mirror))
+ )
+ (fp_line (start -15.748 15.748) (end -15.748 -15.748) (layer B.Fab) (width 0.1))
+ (fp_line (start -15.748 -15.748) (end 15.748 -15.748) (layer B.Fab) (width 0.1))
+ (fp_line (start 15.748 -15.748) (end 15.748 15.748) (layer B.Fab) (width 0.1))
+ (fp_line (start 15.748 15.748) (end -15.748 15.748) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy -13.208 13.208) (xy -15.748 13.208) (xy -15.748 15.748) (xy -13.208 15.748)) (layer B.Fab) (width 0.1))
(pad 208 smd oval (at -12.75 14.75) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
(net 70 FMC_D29))
(pad 207 smd oval (at -12.25 14.75) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
@@ -3810,35 +2370,509 @@
)
)
- (module Cryptech_Alpha_Footprints:B1,27 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 88.3158 -85.1408)
- (path /57D8488D/5802409E)
+ (module Cryptech_Alpha_Footprints:TACTILE_SWITCH (layer F.Cu) (tedit 60BDE2C1) (tstamp 539EEDBF)
+ (at 62.8 -5.3608)
+ (path /57D84FAD/58023F9C)
(attr smd)
- (fp_text reference TP1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference S2 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value ~ (at 0 0) (layer Cmts.User)
+ (fp_text value EVQPT9A15 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad TP smd circle (at 0 0) (size 1.27 1.27) (layers B.Cu B.Paste B.Mask)
- (net 212 "/Entropy source/RAW_NOISE"))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 2 2) (thickness 0.15)))
+ )
+ (fp_line (start -3.048 -3.048) (end 3.048 -3.048) (layer F.Fab) (width 0.1))
+ (fp_line (start 3.048 -3.048) (end 3.048 3.048) (layer F.Fab) (width 0.1))
+ (fp_line (start 3.048 3.048) (end -3.048 3.048) (layer F.Fab) (width 0.1))
+ (fp_line (start -3.048 3.048) (end -3.048 -3.048) (layer F.Fab) (width 0.1))
+ (pad G1 smd rect (at 2.517 0 270) (size 1.016 0.45) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad G2 smd rect (at -2.535 0 270) (size 1.016 0.45) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad B2 smd rect (at -1.8542 -2.2 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad B1 smd rect (at -1.8542 2.2098 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad A1 smd rect (at 1.85 2.2098 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask)
+ (net 618 "Net-(S2-PadA1)"))
+ (pad A2 smd rect (at 1.85 -2.2 180) (size 0.6096 1.016) (layers F.Cu F.Paste F.Mask)
+ (net 604 ICE40_PANIC))
)
- (module Cryptech_Alpha_Footprints:B1,27 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 82.1436 -85.1408)
- (path /57D8488D/5802409D)
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 5F27EEA2)
+ (at 95.8 -10.6)
+ (path /57D8509E/5F17C1AC)
(attr smd)
- (fp_text reference TP2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference LED5 (at -1.312 3.488 270) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value ~ (at 0 0) (layer Cmts.User)
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 584 ICE40_CDONE))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 45.5142 16)
+ (path /57D84936/5802407B)
+ (attr smd)
+ (fp_text reference LED1 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad TP smd circle (at 0 0) (size 1.27 1.27) (layers B.Cu B.Paste B.Mask)
- (net 225 "/Entropy source/AMPLIFIED"))
+ (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 170 "Net-(LED1-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 41.51419 16)
+ (path /57D84936/58024079)
+ (attr smd)
+ (fp_text reference LED2 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KRKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 171 "Net-(LED2-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 39.51419 16)
+ (path /57D84936/5802407C)
+ (attr smd)
+ (fp_text reference LED3 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191TBKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 172 "Net-(LED3-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 43.5142 16)
+ (path /57D84936/5802407A)
+ (attr smd)
+ (fp_text reference LED4 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KSKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 173 "Net-(LED4-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 34.35 16)
+ (path /57D84FAD/58023F8E)
+ (attr smd)
+ (fp_text reference LED9 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 174 "Net-(LED9-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 30.35 16)
+ (path /57D84FAD/58023F9E)
+ (attr smd)
+ (fp_text reference LED10 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KRKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 175 "Net-(LED10-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 28.35 16)
+ (path /57D84FAD/58023F8F)
+ (attr smd)
+ (fp_text reference LED11 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191TBKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 176 "Net-(LED11-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 32.35 16)
+ (path /57D84FAD/58023F8D)
+ (attr smd)
+ (fp_text reference LED12 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KSKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 177 "Net-(LED12-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 74 16)
+ (path /57D85134/58023F59)
+ (attr smd)
+ (fp_text reference LED13 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KRKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 244 "/Config interface/FPGA_DONE_INT"))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 178 "Net-(LED13-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 52.05 16)
+ (path /57D854CB/58023EEE)
+ (attr smd)
+ (fp_text reference LED14 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KRKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 179 "Net-(LED14-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 56.05 16)
+ (path /57D854CB/58023EF0)
+ (attr smd)
+ (fp_text reference LED15 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 180 "Net-(LED15-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 54.05 16)
+ (path /57D854CB/58023EEF)
+ (attr smd)
+ (fp_text reference LED16 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KSKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 181 "Net-(LED16-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
)
- (module Cryptech_Alpha_Footprints:SOT-23-5 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 50.05 16)
+ (path /57D854CB/58023EF1)
+ (attr smd)
+ (fp_text reference LED17 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191TBKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 182 "Net-(LED17-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 60BDE1D7) (tstamp 539EEDBF)
+ (at 76.13225 16)
+ (path /57D85B19/58023E15)
+ (attr smd)
+ (fp_text reference LED18 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.254 90) (layer F.Fab)
+ (effects (font (size 0.4 0.4) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 0.762 1.524) (xy -0.762 1.524) (xy -0.762 1.016) (xy 0.762 1.016)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 184 "Net-(LED18-Pad2)"))
+ (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 183 "Net-(LED18-Pad1)"))
+ (model wrlshp/A9F03225-78F3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:TSOT-8-23 (layer F.Cu) (tedit 60BDE0CF) (tstamp 539EEDBF)
+ (at 70.5 -89.75)
+ (path /57D84708/580240B8)
+ (attr smd)
+ (fp_text reference U2 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LT3060ITS8-15#TRMPBF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0.254) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -2.286 -1.524) (end 2.286 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.286 -1.524) (end 2.286 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.286 1.524) (end -2.286 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.286 1.524) (end -2.286 -1.524) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy -0.508 -0.762) (xy -2.286 -0.762) (xy -2.286 -1.524) (xy -0.508 -1.524)) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1.3 -0.975) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (net 243 /Power/15V_LDO_ENABLE))
+ (pad 2 smd rect (at -1.3 -0.325) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 3 smd rect (at -1.3 0.3302) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 4 smd rect (at -1.3 0.9906) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 5 smd rect (at 1.3208 0.9906) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (net 202 PWR_18V))
+ (pad 6 smd rect (at 1.3208 0.3302) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (net 2 15V_STABLE))
+ (pad 7 smd rect (at 1.3208 -0.325) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (net 150 "Net-(C11-Pad1)"))
+ (pad 8 smd rect (at 1.3208 -0.975) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (net 151 "Net-(C12-Pad2)"))
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23-5 (layer B.Cu) (tedit 60BDE057) (tstamp 539EEDBF)
(at 77.3684 -85.1408)
(path /57D8488D/5802409C)
(attr smd)
@@ -3848,6 +2882,15 @@
(fp_text value MC74HC1G14DTT1G (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -2.032 1.524) (end 2.032 1.524) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.032 1.524) (end 2.032 -1.524) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.032 -1.524) (end -2.032 -1.524) (layer B.Fab) (width 0.1))
+ (fp_line (start -2.032 -1.524) (end -2.032 1.524) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 2.032 -1.524) (xy 0.762 -1.524) (xy 0.762 -1.27) (xy 1.778 -1.27)
+ (xy 1.778 -0.508) (xy 2.032 -0.508)) (layer B.Fab) (width 0.1))
(pad 5 smd rect (at -1.35 -0.95 90) (size 0.65 1.1) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 4 smd rect (at -1.35 0.95 90) (size 0.65 1.1) (layers B.Cu B.Paste B.Mask)
@@ -3870,55 +2913,728 @@
)
)
- (module Cryptech_Alpha_Footprints:TSOT-8-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 70.5 -89.75)
- (path /57D84708/580240B8)
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer B.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 82.8548 -89.1794 90)
+ (path /57D8488D/58024095)
(attr smd)
- (fp_text reference U2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference D1 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LT3060ITS8-15#TRMPBF (at 0 0) (layer Cmts.User)
+ (fp_text value BAT54LT1G (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at -1.3 -0.975) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
- (net 243 /Power/15V_LDO_ENABLE))
- (pad 2 smd rect (at -1.3 -0.325) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 -90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start 1.524 1.778) (end -1.524 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -1.778) (end 1.524 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end 1.524 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end -1.524 -1.778) (layer B.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 -1.1 180) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 225 "/Entropy source/AMPLIFIED"))
+ (pad 2 smd rect (at -0.95 1.1 180) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask))
+ (pad 1 smd rect (at 0.95 1.1 180) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 4 "Net-(C15-Pad2)"))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 20.9804 -63.5508 270)
+ (path /57D85B19/58023E10)
+ (attr smd)
+ (fp_text reference D2 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value BAT54LT1G (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 1.524 -1.778) (end -1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 1.778) (end 1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end 1.524 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end -1.524 1.778) (layer F.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 209 VCC_5V0))
+ (pad 2 smd rect (at -0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask))
+ (pad 1 smd rect (at 0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 204 PWR_ENA_VCCINT))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 11.6078 -47.2694 270)
+ (path /57D85B19/58023E0A)
+ (attr smd)
+ (fp_text reference D3 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value BAT54LT1G (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 1.524 -1.778) (end -1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 1.778) (end 1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end 1.524 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end -1.524 1.778) (layer F.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 199 POK_VCCAUX))
+ (pad 2 smd rect (at -0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask))
+ (pad 1 smd rect (at 0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 205 PWR_ENA_VCCO))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 32.8168 -72.9234 90)
+ (path /57D85B19/58023E0D)
+ (attr smd)
+ (fp_text reference D4 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value BAT54LT1G (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 1.524 -1.778) (end -1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 1.778) (end 1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end 1.524 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end -1.524 1.778) (layer F.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 200 POK_VCCINT))
+ (pad 2 smd rect (at -0.95 -1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask))
+ (pad 1 smd rect (at 0.95 -1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 203 PWR_ENA_VCCAUX))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 72.452 -95.2388)
+ (path /57D84708/580240BE)
+ (attr smd)
+ (fp_text reference Q1 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 2N7002 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 1.524 -1.778) (end -1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 1.778) (end 1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end 1.524 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end -1.524 1.778) (layer F.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 1.1 270) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 169 "Net-(JP2-Pad2)"))
+ (pad 2 smd rect (at -0.95 -1.1 270) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 3 smd rect (at -1.3 0.3302) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 0.95 -1.1 270) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 185 "Net-(Q1-Pad1)"))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer B.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 90.3732 -92.7862 270)
+ (path /57D8488D/580240A1)
+ (attr smd)
+ (fp_text reference Q2 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value BC818-40LT1G (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start 1.524 1.778) (end -1.524 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -1.778) (end 1.524 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end 1.524 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end -1.524 -1.778) (layer B.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 -1.1) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 269 "Net-(Q2-Pad3)"))
+ (pad 2 smd rect (at -0.95 1.1) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 211 "/Entropy source/NOISE_IN"))
+ (pad 1 smd rect (at 0.95 1.1) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 245 "/Entropy source/NOISE_OUT"))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 89.3064 -73.0504 270)
+ (path /57D85134/58023F5B)
+ (attr smd)
+ (fp_text reference Q4 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 2N7002 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 1.524 -1.778) (end -1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 1.778) (end 1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end 1.524 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end -1.524 1.778) (layer F.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 246 "/Config interface/FPGA_INIT_B_INT"))
+ (pad 2 smd rect (at -0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 4 smd rect (at -1.3 0.9906) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 119 FPGA_INIT_B))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 15.7398 -42.4106 90)
+ (path /57D85B19/58023E16)
+ (attr smd)
+ (fp_text reference Q6 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 2N7002 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 1.524 -1.778) (end -1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 1.778) (end 1.524 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end 1.524 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end -1.524 1.778) (layer F.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 184 "Net-(LED18-Pad2)"))
+ (pad 2 smd rect (at -0.95 -1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 5 smd rect (at 1.3208 0.9906) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
- (net 202 PWR_18V))
- (pad 6 smd rect (at 1.3208 0.3302) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
- (net 2 15V_STABLE))
- (pad 7 smd rect (at 1.3208 -0.325) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
- (net 150 "Net-(C11-Pad1)"))
- (pad 8 smd rect (at 1.3208 -0.975) (size 1.2446 0.4064) (layers F.Cu F.Paste F.Mask)
- (net 151 "Net-(C12-Pad2)"))
+ (pad 1 smd rect (at 0.95 -1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (net 201 POK_VCCO))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
)
- (module Cryptech_Alpha_Footprints:ASF (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 67.9704 -84.709)
- (path /57D85260/58023F3D)
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer B.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 90.2208 -88.1634 180)
+ (path /57D8488D/580240A0)
(attr smd)
- (fp_text reference Q5 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference T1 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value ASFL1-50.000MHZ-EK-T (at 0 0) (layer Cmts.User)
+ (fp_text value BC847BLT3G (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 4 smd rect (at -1.0922 -1.2524 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start 1.524 1.778) (end -1.524 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -1.778) (end 1.524 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end 1.524 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end -1.524 -1.778) (layer B.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 -1.1 270) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 212 "/Entropy source/RAW_NOISE"))
+ (pad 2 smd rect (at -0.95 1.1 270) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0.95 1.1 270) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 245 "/Entropy source/NOISE_OUT"))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT-23 (layer B.Cu) (tedit 60BDDFDC) (tstamp 539EEDBF)
+ (at 84.201 -82.7532)
+ (path /57D8488D/5802409F)
+ (attr smd)
+ (fp_text reference T2 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value BC847BLT3G (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 -180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start 1.524 1.778) (end -1.524 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -1.778) (end 1.524 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -1.778) (end 1.524 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 1.778) (end -1.524 -1.778) (layer B.Fab) (width 0.1))
+ (pad 3 smd rect (at 0 -1.1 90) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 225 "/Entropy source/AMPLIFIED"))
+ (pad 2 smd rect (at -0.95 1.1 90) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0.95 1.1 90) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 4 "Net-(C15-Pad2)"))
+ (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
+ (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/04B9CA18-3B1B.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:SOIC127P600X175-8N (layer F.Cu) (tedit 60BDDF09) (tstamp 539EEDBF)
+ (at 25.6 -43.45 270)
+ (path /57D84C55/58024021)
+ (attr smd)
+ (fp_text reference U7 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value MCP79412-I_SN (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0.762 0) (layer F.Fab)
+ (effects (font (size 2 2) (thickness 0.15)))
+ )
+ (fp_line (start -2.794 -4.064) (end 2.794 -4.064) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.794 -4.064) (end 2.794 4.064) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.794 4.064) (end -2.794 4.064) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.794 4.064) (end -2.794 -4.064) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy -1.016 4.064) (xy -2.794 4.064) (xy -2.794 1.778) (xy -1.016 1.778)) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1.905 2.7178) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 153 "Net-(C70-Pad2)"))
+ (pad 2 smd rect (at -0.635 2.7178) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 154 "Net-(C71-Pad2)"))
+ (pad 3 smd rect (at 0.635 2.7178) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (pad 4 smd rect (at 1.905 2.7178) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 5 smd rect (at 1.905 -2.6924) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 208 RTC_SDA))
+ (pad 6 smd rect (at 0.635 -2.6924) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 207 RTC_SCL))
+ (pad 7 smd rect (at -0.635 -2.6924) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 206 RTC_MFP))
+ (pad 8 smd rect (at -1.905 -2.6924) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
- (pad 3 smd rect (at -1.0922 1.2954 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
- (net 187 "Net-(Q5-Pad3)"))
- (pad 1 smd rect (at 1.1302 -1.2524 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
- (net 186 "Net-(Q5-Pad1)"))
- (pad 2 smd rect (at 1.1302 1.2954 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ )
+
+ (module Cryptech_Alpha_Footprints:SO20W (layer F.Cu) (tedit 60BDDB8C) (tstamp 539EEDBF)
+ (at 39.356 -38.3524 90)
+ (path /57D85260/58023F40)
+ (attr smd)
+ (fp_text reference IC2 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value MC74AC244DW* (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 4 4) (thickness 0.3)))
+ )
+ (fp_line (start -6.604 -6.604) (end -6.604 6.604) (layer F.Fab) (width 0.1))
+ (fp_line (start -6.604 6.604) (end 6.604 6.604) (layer F.Fab) (width 0.1))
+ (fp_line (start 6.604 6.604) (end 6.604 -6.604) (layer F.Fab) (width 0.1))
+ (fp_line (start 6.604 -6.604) (end -6.604 -6.604) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy -4.826 6.604) (xy -6.604 6.604) (xy -6.604 3.556) (xy -4.826 3.556)) (layer F.Fab) (width 0.1))
+ (pad 11 smd rect (at 5.715 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 90 FPGA_CFG_CS_N))
+ (pad 12 smd rect (at 4.445 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 6 ARM_FPGA_CFG_MISO))
+ (pad 10 smd rect (at 5.715 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
+ (pad 9 smd rect (at 4.445 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 226 "/Config memory/FPGA_PROM_CS_N"))
+ (pad 20 smd rect (at -5.715 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 19 smd rect (at -4.445 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 227 "/Config memory/SPI_B_TRISTATE"))
+ (pad 18 smd rect (at -3.175 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 226 "/Config memory/FPGA_PROM_CS_N"))
+ (pad 17 smd rect (at -1.905 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 228 "/Config memory/FPGA_PROM_MISO"))
+ (pad 16 smd rect (at -0.635 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 229 "/Config memory/FPGA_PROM_SCLK"))
+ (pad 15 smd rect (at 0.635 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 94 FPGA_CFG_MOSI))
+ (pad 14 smd rect (at 1.905 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 230 "/Config memory/FPGA_PROM_MOSI"))
+ (pad 13 smd rect (at 3.175 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 95 FPGA_CFG_SCLK))
+ (pad 8 smd rect (at 3.175 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 228 "/Config memory/FPGA_PROM_MISO"))
+ (pad 7 smd rect (at 1.905 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 229 "/Config memory/FPGA_PROM_SCLK"))
+ (pad 6 smd rect (at 0.635 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 7 ARM_FPGA_CFG_MOSI))
+ (pad 5 smd rect (at -0.635 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 230 "/Config memory/FPGA_PROM_MOSI"))
+ (pad 4 smd rect (at -1.905 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 8 ARM_FPGA_CFG_SCLK))
+ (pad 3 smd rect (at -3.175 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 93 FPGA_CFG_MISO))
+ (pad 2 smd rect (at -4.445 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 5 ARM_FPGA_CFG_CS_N))
+ (pad 1 smd rect (at -5.715 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 231 "/Config memory/SPI_A_TRISTATE"))
)
- (module Cryptech_Alpha_Footprints:QFN38 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:SO08 (layer F.Cu) (tedit 60BDDB3A) (tstamp 539EEDBF)
+ (at 33.1552 -51.028)
+ (path /57D84C13/5802402B)
+ (attr smd)
+ (fp_text reference IC1 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value MT25QL128ABA1ESE (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 2 2) (thickness 0.2)))
+ )
+ (fp_line (start 4.572 -2.794) (end -4.572 -2.794) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.572 -2.794) (end -4.572 2.794) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.572 2.794) (end 4.572 2.794) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.572 2.794) (end 4.572 -2.794) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy -2.032 -1.524) (xy -4.572 -1.524) (xy -4.572 -2.794) (xy -2.032 -2.794)) (layer F.Fab) (width 0.1))
+ (pad 5 smd rect (at 3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 147 KSM_PROM_MOSI))
+ (pad 4 smd rect (at -3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 6 smd rect (at 3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 148 KSM_PROM_SCLK))
+ (pad 7 smd rect (at 3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 3 smd rect (at -3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 168 "Net-(IC1-Pad3)"))
+ (pad 2 smd rect (at -3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 146 KSM_PROM_MISO))
+ (pad 8 smd rect (at 3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 1 smd rect (at -3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 145 KSM_PROM_CS_N))
+ )
+
+ (module Cryptech_Alpha_Footprints:SO08 (layer F.Cu) (tedit 60BDDB3A) (tstamp 539EEDBF)
+ (at 45.5368 -25.2832)
+ (path /57D85260/58023F42)
+ (attr smd)
+ (fp_text reference IC3 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value MT25QL128ABA1ESE (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 2 2) (thickness 0.2)))
+ )
+ (fp_line (start 4.572 -2.794) (end -4.572 -2.794) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.572 -2.794) (end -4.572 2.794) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.572 2.794) (end 4.572 2.794) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.572 2.794) (end 4.572 -2.794) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy -2.032 -1.524) (xy -4.572 -1.524) (xy -4.572 -2.794) (xy -2.032 -2.794)) (layer F.Fab) (width 0.1))
+ (pad 5 smd rect (at 3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 230 "/Config memory/FPGA_PROM_MOSI"))
+ (pad 4 smd rect (at -3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 6 smd rect (at 3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 229 "/Config memory/FPGA_PROM_SCLK"))
+ (pad 7 smd rect (at 3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 3 smd rect (at -3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 232 "/Config memory/FPGA_PROM_W_N"))
+ (pad 2 smd rect (at -3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 228 "/Config memory/FPGA_PROM_MISO"))
+ (pad 8 smd rect (at 3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 1 smd rect (at -3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (net 226 "/Config memory/FPGA_PROM_CS_N"))
+ )
+
+ (module Cryptech_Alpha_Footprints:RCLAMP0502A (layer F.Cu) (tedit 60BDDAD0) (tstamp 539EEDBF)
+ (at 51.816 -11.0744)
+ (path /57D84CB3/58023FF2)
+ (attr smd)
+ (fp_text reference IC5 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value RCLAMP0502A.TCT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.27) (end -0.762 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.27) (end 0.762 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.27) (end 0.762 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.762) (end 0.254 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.254 -1.27) (end -0.762 -1.27) (layer F.Fab) (width 0.1))
+ (pad 6 smd rect (at 0.5 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 222 "/User USB UART/D1_P"))
+ (pad 5 smd rect (at 0 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 144 FT_VREGIN))
+ (pad 4 smd rect (at -0.5 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 221 "/User USB UART/D1_N"))
+ (pad 3 smd rect (at -0.5 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 233 "/User USB UART/USB_N"))
+ (pad 2 smd rect (at 0 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0.5 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 234 "/User USB UART/USB_P"))
+ )
+
+ (module Cryptech_Alpha_Footprints:RCLAMP0502A (layer F.Cu) (tedit 60BDDAD0) (tstamp 539EEDBF)
+ (at 69.1134 -11.0744)
+ (path /57D84E30/58023FBC)
+ (attr smd)
+ (fp_text reference IC6 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value RCLAMP0502A.TCT (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.27) (end -0.762 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.27) (end 0.762 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.27) (end 0.762 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.762) (end 0.254 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.254 -1.27) (end -0.762 -1.27) (layer F.Fab) (width 0.1))
+ (pad 6 smd rect (at 0.5 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 224 "/MGMT USB UART/DM_P"))
+ (pad 5 smd rect (at 0 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 137 FT_MGMT_VREGIN))
+ (pad 4 smd rect (at -0.5 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 223 "/MGMT USB UART/DM_N"))
+ (pad 3 smd rect (at -0.5 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 235 "/MGMT USB UART/USB_MGMT_N"))
+ (pad 2 smd rect (at 0 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0.5 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (net 236 "/MGMT USB UART/USB_MGMT_P"))
+ )
+
+ (module Cryptech_Alpha_Footprints:QFN68 (layer B.Cu) (tedit 60BDDA1D) (tstamp 539EEDBF)
+ (at 25.9842 -57.4802)
+ (path /57D85A75/58023E29)
+ (attr smd)
+ (fp_text reference U16 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value EN5364QI (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 3 3) (thickness 0.2)) (justify mirror))
+ )
+ (fp_line (start -6.096 4.572) (end -6.096 -4.572) (layer B.Fab) (width 0.1))
+ (fp_line (start -6.096 -4.572) (end 6.096 -4.572) (layer B.Fab) (width 0.1))
+ (fp_line (start 6.096 -4.572) (end 6.096 4.572) (layer B.Fab) (width 0.1))
+ (fp_line (start 6.096 4.572) (end -6.096 4.572) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 6.096 -4.572) (xy 4.826 -4.572) (xy 4.826 -3.81) (xy 6.096 -3.81)) (layer B.Fab) (width 0.1))
+ (pad 1 smd oval (at 5.5 -3.5052 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 2 smd oval (at 5.5 -3.0226 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 3 smd oval (at 5.5 -2.5146 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 4 smd oval (at 5.5 -2.0066 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 5 smd oval (at 5.5 -1.524 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 6 smd oval (at 5.5 -1.016 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 7 smd oval (at 5.5 -0.508 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 8 smd oval (at 5.5 0 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 9 smd oval (at 5.5 0.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 10 smd oval (at 5.5 1 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 11 smd oval (at 5.5 1.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 12 smd oval (at 5.5 2 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 13 smd oval (at 5.5 2.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (pad 14 smd oval (at 5.5 3 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 15 smd oval (at 5.5 3.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 16 smd oval (at 4.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 17 smd oval (at 4 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 18 smd oval (at 3.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 19 smd oval (at 3 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 20 smd oval (at 2.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 21 smd oval (at 2 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 22 smd oval (at 1.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 23 smd oval (at 1 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 24 smd oval (at 0.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 25 smd oval (at 0 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 26 smd oval (at -0.508 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 27 smd oval (at -1.016 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 28 smd oval (at -1.524 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 29 smd oval (at -2.0066 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 30 smd oval (at -2.5146 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 31 smd oval (at -3.0226 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 32 smd oval (at -3.5052 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 33 smd oval (at -4.0132 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 34 smd oval (at -4.5212 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 35 smd oval (at -5.5118 3.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 36 smd oval (at -5.5118 3) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 37 smd oval (at -5.5118 2.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 38 smd oval (at -5.5118 2) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 39 smd oval (at -5.5118 1.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 40 smd oval (at -5.5118 1) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 41 smd oval (at -5.5118 0.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 42 smd oval (at -5.5118 0) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 43 smd oval (at -5.5118 -0.508) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 44 smd oval (at -5.5118 -1.016) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 45 smd oval (at -5.5118 -1.524) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 46 smd oval (at -5.5118 -2.0066) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 47 smd oval (at -5.5118 -2.5146) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
+ (pad 48 smd oval (at -5.5118 -3.0226) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 562 "Net-(U16-Pad48)"))
+ (pad 49 smd oval (at -5.5118 -3.5052) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 563 "Net-(U16-Pad49)"))
+ (pad 50 smd oval (at -4.5212 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 564 "Net-(U16-Pad50)"))
+ (pad 51 smd oval (at -4.0132 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 197 "Net-(R66-Pad1)"))
+ (pad 52 smd oval (at -3.5052 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 204 PWR_ENA_VCCINT))
+ (pad 53 smd oval (at -3.0226 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 54 smd oval (at -2.5146 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 200 POK_VCCINT))
+ (pad 55 smd oval (at -2.0066 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 56 smd oval (at -1.524 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 167 "Net-(C208-Pad2)"))
+ (pad 57 smd oval (at -1.016 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 565 "Net-(U16-Pad57)"))
+ (pad 58 smd oval (at -0.508 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 566 "Net-(U16-Pad58)"))
+ (pad 59 smd oval (at 0 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 165 "Net-(C207-Pad1)"))
+ (pad 60 smd oval (at 0.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 567 "Net-(U16-Pad60)"))
+ (pad 61 smd oval (at 1 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 568 "Net-(U16-Pad61)"))
+ (pad 62 smd oval (at 1.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 569 "Net-(U16-Pad62)"))
+ (pad 63 smd oval (at 2 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 198 "Net-(R67-Pad1)"))
+ (pad 64 smd oval (at 2.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 65 smd oval (at 3 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 66 smd oval (at 3.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 67 smd oval (at 4 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 68 smd oval (at 4.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad PAD69 smd oval (at -2.175 0.625 90) (size 5.35 2.35) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad PAD70 smd oval (at 3.55 -2.65 180) (size 2.5 1.3) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ )
+
+ (module Cryptech_Alpha_Footprints:QFN38 (layer B.Cu) (tedit 60BDD9B9) (tstamp 539EEDBF)
(at 35.4584 -76.5556 180)
(path /57D853B0/58023F0C)
(attr smd)
@@ -3928,6 +3644,14 @@
(fp_text value EN6347QI (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 2 2) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -2.286 3.81) (end -2.286 -3.81) (layer B.Fab) (width 0.1))
+ (fp_line (start -2.286 -3.81) (end 2.286 -3.81) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.286 -3.81) (end 2.286 3.81) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.286 3.81) (end -2.286 3.81) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 2.286 3.302) (xy 1.778 3.302) (xy 1.778 3.81) (xy 2.286 3.81)) (layer B.Fab) (width 0.1))
(pad 1 smd oval (at 1.27 3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
(pad 2 smd oval (at 0.762 3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
(pad 3 smd oval (at 0.254 3.4 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
@@ -3994,7 +3718,7 @@
(net 3 GND))
)
- (module Cryptech_Alpha_Footprints:QFN38 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:QFN38 (layer B.Cu) (tedit 60BDD9B9) (tstamp 539EEDBF)
(at 10.8458 -41.0972)
(path /57D853B0/58023F0B)
(attr smd)
@@ -4004,6 +3728,14 @@
(fp_text value EN6347QI (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 -270) (layer B.Fab)
+ (effects (font (size 2 2) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -2.286 3.81) (end -2.286 -3.81) (layer B.Fab) (width 0.1))
+ (fp_line (start -2.286 -3.81) (end 2.286 -3.81) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.286 -3.81) (end 2.286 3.81) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.286 3.81) (end -2.286 3.81) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 2.286 3.302) (xy 1.778 3.302) (xy 1.778 3.81) (xy 2.286 3.81)) (layer B.Fab) (width 0.1))
(pad 1 smd oval (at 1.27 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
(pad 2 smd oval (at 0.762 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
(pad 3 smd oval (at 0.254 3.4 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
@@ -4070,100 +3802,70 @@
(net 3 GND))
)
- (module Cryptech_Alpha_Footprints:SOIC127P600X175-8N (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 25.6 -43.45 270)
- (path /57D84C55/58024021)
+ (module Cryptech_Alpha_Footprints:PLS-8 (layer F.Cu) (tedit 60BDD914) (tstamp 539EEDBF)
+ (at 40.3 -1.3)
+ (path /57D85134/58023F68)
(attr smd)
- (fp_text reference U7 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value MCP79412-I_SN (at 0 0 90) (layer Cmts.User)
+ (fp_text reference SV1 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at -1.905 2.7178) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
- (net 153 "Net-(C70-Pad2)"))
- (pad 2 smd rect (at -0.635 2.7178) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
- (net 154 "Net-(C71-Pad2)"))
- (pad 3 smd rect (at 0.635 2.7178) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
- (net 1 3V3_BATT))
- (pad 4 smd rect (at 1.905 2.7178) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 5 smd rect (at 1.905 -2.6924) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
- (net 208 RTC_SDA))
- (pad 6 smd rect (at 0.635 -2.6924) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
- (net 207 RTC_SCL))
- (pad 7 smd rect (at -0.635 -2.6924) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
- (net 206 RTC_MFP))
- (pad 8 smd rect (at -1.905 -2.6924) (size 1.55 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- )
-
- (module Cryptech_Alpha_Footprints:SO08 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 33.1552 -51.028)
- (path /57D84C13/5802402B)
- (attr smd)
- (fp_text reference IC1 (at 0 0) (layer F.SilkS) hide
+ (fp_text value "PIN HEADER 0.1\"" (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value MT25QL128ABA1ESE (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (pad 5 smd rect (at 3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 147 KSM_PROM_MOSI))
- (pad 4 smd rect (at -3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (fp_line (start -10.16 -1.27) (end -10.16 0) (layer F.Fab) (width 0.1))
+ (fp_line (start -10.16 0) (end -8.89 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -8.89 1.27) (end 10.16 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 10.16 1.27) (end 10.16 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 10.16 -1.27) (end -10.16 -1.27) (layer F.Fab) (width 0.1))
+ (pad 8 thru_hole circle (at 8.89 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 3 GND))
- (pad 6 smd rect (at 3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 148 KSM_PROM_SCLK))
- (pad 7 smd rect (at 3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 3 smd rect (at -3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 168 "Net-(IC1-Pad3)"))
- (pad 2 smd rect (at -3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 146 KSM_PROM_MISO))
- (pad 8 smd rect (at 3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (pad 1 thru_hole rect (at -8.89 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 210 VCCO_3V3))
- (pad 1 smd rect (at -3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 145 KSM_PROM_CS_N))
- )
-
- (module Cryptech_Alpha_Footprints:SO08 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 45.5368 -25.2832)
- (path /57D85260/58023F42)
- (attr smd)
- (fp_text reference IC3 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (pad 2 thru_hole circle (at -6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 258 "/Config interface/FPGA_JTAG_TCK"))
+ (pad 3 thru_hole circle (at -3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 257 "/Config interface/FPGA_JTAG_TMS"))
+ (pad 4 thru_hole circle (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 256 "/Config interface/FPGA_JTAG_TDI"))
+ (pad 5 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 265 "/Config interface/FPGA_JTAG_TDO"))
+ (pad 6 thru_hole circle (at 3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 7 thru_hole circle (at 6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (model wrlshp/PLS-8.wrl
+ (offset (xyz 8.889999866485596 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
)
- (fp_text value MT25QL128ABA1ESE (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (model wrlshp/A962434E-CFE5.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
)
- (pad 5 smd rect (at 3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 230 "/Config memory/FPGA_PROM_MOSI"))
- (pad 4 smd rect (at -3.0734 1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 6 smd rect (at 3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 229 "/Config memory/FPGA_PROM_SCLK"))
- (pad 7 smd rect (at 3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 3 smd rect (at -3.0734 0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 232 "/Config memory/FPGA_PROM_W_N"))
- (pad 2 smd rect (at -3.0734 -0.635 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 228 "/Config memory/FPGA_PROM_MISO"))
- (pad 8 smd rect (at 3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 1 smd rect (at -3.0734 -1.905 270) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 226 "/Config memory/FPGA_PROM_CS_N"))
)
- (module Cryptech_Alpha_Footprints:PLS-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:PLS-6 (layer F.Cu) (tedit 60BDD8EC) (tstamp 539EEDBF)
(at 22.78379 -20.4216)
(path /57D84936/58024085)
(attr smd)
(fp_text reference J1 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLS-6 (at 0 0) (layer Cmts.User)
+ (fp_text value "STM32 SWD connector" (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -7.62 -1.27) (end -7.62 0) (layer F.Fab) (width 0.1))
+ (fp_line (start -7.62 0) (end -6.35 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -6.35 1.27) (end 7.62 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 7.62 1.27) (end 7.62 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 7.62 -1.27) (end -7.62 -1.27) (layer F.Fab) (width 0.1))
(pad 6 thru_hole circle (at 6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 268 "Net-(J1-Pad6)"))
(pad 5 thru_hole circle (at 3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -4188,7 +3890,888 @@
)
)
- (module Cryptech_Alpha_Footprints:HDR1X10 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:PLS-3 (layer F.Cu) (tedit 60BDD856) (tstamp 539EEDBF)
+ (at 88.67933 1.5)
+ (path /57D84FAD/58023F9B)
+ (attr smd)
+ (fp_text reference JP4 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value "Standard 3-pin 0.1\" header. Use with straight break away headers (SKU : PRT-00116), right angle break away headers (PRT-00553), swiss pins (PRT-00743), machine pins (PRT-00117), and female headers (PRT-00115). Molex polarized connector foot print use with SKU : PRT-08232 with associated crimp pins and housings." (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -3.81 -1.27) (end -3.81 0) (layer F.Fab) (width 0.1))
+ (fp_line (start -3.81 0) (end -2.54 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.54 1.27) (end 3.81 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 3.81 1.27) (end 3.81 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 3.81 -1.27) (end -3.81 -1.27) (layer F.Fab) (width 0.1))
+ (pad 3 thru_hole circle (at 2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 2 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 1 3V3_BATT))
+ (pad 1 thru_hole rect (at -2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (model wrlshp/pin_header_aw_108_03-t.wrl
+ (offset (xyz 0.05003799924850464 0.05003799924850464 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 90 360 0))
+ )
+ (model wrlshp/836C6F64-A2E5.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:PLS-2 (layer F.Cu) (tedit 60BDD824) (tstamp 5F27EE3C)
+ (at 75 -19.8 180)
+ (path /57D84FAD/5F27A891)
+ (attr smd)
+ (fp_text reference JP3 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value "Wurth 2pins connector (for jumper)" (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -2.54 -1.27) (end -2.54 0) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.54 0) (end -1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 1.27) (end 2.54 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 1.27) (end 2.54 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 -1.27) (end -2.54 -1.27) (layer F.Fab) (width 0.1))
+ (pad 2 thru_hole circle (at 1.27 0 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 594 ICE40_JUMPER))
+ (pad 1 thru_hole rect (at -1.27 0 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (model "wrlshp/User Library-Header1x2.wrl"
+ (offset (xyz 5.675121914768218 11.80693582267761 -6.799998997874261))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/3416A7AC-A52A.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:PLS-2 (layer F.Cu) (tedit 60BDD824) (tstamp 539EEDBF)
+ (at 64.6468 -91.7448)
+ (path /57D84708/580240BB)
+ (attr smd)
+ (fp_text reference JP2 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value "Wurth 2pins connector (for jumper)" (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -2.54 -1.27) (end -2.54 0) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.54 0) (end -1.27 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 1.27) (end 2.54 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 1.27) (end 2.54 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 -1.27) (end -2.54 -1.27) (layer F.Fab) (width 0.1))
+ (pad 2 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 169 "Net-(JP2-Pad2)"))
+ (pad 1 thru_hole rect (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 243 /Power/15V_LDO_ENABLE))
+ (model "wrlshp/User Library-Header1x2.wrl"
+ (offset (xyz 5.675121914768218 11.80693582267761 -6.799998997874261))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/3416A7AC-A52A.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:PLD-6 (layer F.Cu) (tedit 60BDD7F2) (tstamp 539EEDBF)
+ (at 41.04639 -12.5222 90)
+ (path /57D84CB3/58023FEF)
+ (attr smd)
+ (fp_text reference J2 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value "2x3 .1\" header" (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -2.54 3.81) (end 2.54 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 3.81) (end 2.54 -3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 -3.81) (end -1.27 -3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -3.81) (end -2.54 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.54 -2.54) (end -2.54 3.81) (layer F.Fab) (width 0.1))
+ (pad 1 thru_hole rect (at -1.27 -2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 2 thru_hole circle (at 1.27 -2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 144 FT_VREGIN))
+ (pad 3 thru_hole circle (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 234 "/User USB UART/USB_P"))
+ (pad 4 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 233 "/User USB UART/USB_N"))
+ (pad 5 thru_hole circle (at -1.27 2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 239 "/User USB UART/FT_RXD1"))
+ (pad 6 thru_hole circle (at 1.27 2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 240 "/User USB UART/FT_TXD1"))
+ (model wrlshp/pin_header_awl254-dg-g06d.wrl
+ (offset (xyz 0 -0.009905999851226806 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 90 360 90))
+ )
+ (model wrlshp/B3089A96-FA19.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:PLD-6 (layer F.Cu) (tedit 60BDD7F2) (tstamp 539EEDBF)
+ (at 74.90459 -12.5222 90)
+ (path /57D84E30/58023FB9)
+ (attr smd)
+ (fp_text reference J3 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value "2x3 .1\" header" (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -2.54 3.81) (end 2.54 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 3.81) (end 2.54 -3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 -3.81) (end -1.27 -3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -3.81) (end -2.54 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.54 -2.54) (end -2.54 3.81) (layer F.Fab) (width 0.1))
+ (pad 1 thru_hole rect (at -1.27 -2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 2 thru_hole circle (at 1.27 -2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 137 FT_MGMT_VREGIN))
+ (pad 3 thru_hole circle (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 236 "/MGMT USB UART/USB_MGMT_P"))
+ (pad 4 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 235 "/MGMT USB UART/USB_MGMT_N"))
+ (pad 5 thru_hole circle (at -1.27 2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 241 "/MGMT USB UART/FT_MGMT_RXD1"))
+ (pad 6 thru_hole circle (at 1.27 2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 242 "/MGMT USB UART/FT_MGMT_TXD1"))
+ (model wrlshp/pin_header_awl254-dg-g06d.wrl
+ (offset (xyz 0 -0.009905999851226806 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 90 360 90))
+ )
+ (model wrlshp/B3089A96-FA19.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:PLD-6 (layer F.Cu) (tedit 60BDD7F2) (tstamp 539EEDBF)
+ (at 18.25 -29.475)
+ (path /57D85260/58023F3C)
+ (attr smd)
+ (fp_text reference JP7 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value "2x3 .1\" header" (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -2.54 3.81) (end 2.54 3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 3.81) (end 2.54 -3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.54 -3.81) (end -1.27 -3.81) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 -3.81) (end -2.54 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.54 -2.54) (end -2.54 3.81) (layer F.Fab) (width 0.1))
+ (pad 1 thru_hole rect (at -1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 91 FPGA_CFG_CTRL_ARM_ENA))
+ (pad 2 thru_hole circle (at 1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 231 "/Config memory/SPI_A_TRISTATE"))
+ (pad 3 thru_hole circle (at -1.27 0 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 92 FPGA_CFG_CTRL_FPGA_DIS))
+ (pad 4 thru_hole circle (at 1.27 0 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 227 "/Config memory/SPI_B_TRISTATE"))
+ (pad 5 thru_hole circle (at -1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 232 "/Config memory/FPGA_PROM_W_N"))
+ (pad 6 thru_hole circle (at 1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (model wrlshp/pin_header_awl254-dg-g06d.wrl
+ (offset (xyz 0 -0.009905999851226806 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 90 360 90))
+ )
+ (model wrlshp/B3089A96-FA19.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:PLD-16 (layer F.Cu) (tedit 60BDD74B) (tstamp 539EEDBF)
+ (at 59.58299 -97.7646)
+ (path /57D854CB/58023EF9)
+ (attr smd)
+ (fp_text reference SV2 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value "PIN HEADER 0.1\"" (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 8.89 -2.54) (end -10.16 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 10.16 -1.27) (end 8.89 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 10.16 2.54) (end 10.16 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -10.16 2.54) (end 10.16 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -10.16 -2.54) (end -10.16 2.54) (layer F.Fab) (width 0.1))
+ (pad 1 thru_hole rect (at 8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 thru_hole circle (at 8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (pad 3 thru_hole circle (at 6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (pad 4 thru_hole circle (at 6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (pad 5 thru_hole circle (at 3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 6 thru_hole circle (at 3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 7 thru_hole circle (at 1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 99 FPGA_GPIO_A_0))
+ (pad 8 thru_hole circle (at 1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 100 FPGA_GPIO_A_1))
+ (pad 9 thru_hole circle (at -1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 101 FPGA_GPIO_A_2))
+ (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 102 FPGA_GPIO_A_3))
+ (pad 11 thru_hole circle (at -3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 12 thru_hole circle (at -3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 13 thru_hole circle (at -6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 103 FPGA_GPIO_A_4))
+ (pad 14 thru_hole circle (at -6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 104 FPGA_GPIO_A_5))
+ (pad 15 thru_hole circle (at -8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 105 FPGA_GPIO_A_6))
+ (pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 106 FPGA_GPIO_A_7))
+ (model wrlshp/pin_header_awl254-dg-g16d.wrl
+ (offset (xyz -0.006349999904632569 -0.03632199945449829 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 90 360 180))
+ )
+ (model wrlshp/B280C847-2543.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:PLD-16 (layer F.Cu) (tedit 60BDD74B) (tstamp 539EEDBF)
+ (at 36.79919 -97.7646)
+ (path /57D854CB/58023EF4)
+ (attr smd)
+ (fp_text reference SV3 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value "PIN HEADER 0.1\"" (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start 8.89 -2.54) (end -10.16 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 10.16 -1.27) (end 8.89 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 10.16 2.54) (end 10.16 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -10.16 2.54) (end 10.16 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -10.16 -2.54) (end -10.16 2.54) (layer F.Fab) (width 0.1))
+ (pad 1 thru_hole rect (at 8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 thru_hole circle (at 8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (pad 3 thru_hole circle (at 6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (pad 4 thru_hole circle (at 6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 210 VCCO_3V3))
+ (pad 5 thru_hole circle (at 3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 6 thru_hole circle (at 3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 7 thru_hole circle (at 1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 107 FPGA_GPIO_B_0))
+ (pad 8 thru_hole circle (at 1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 108 FPGA_GPIO_B_1))
+ (pad 9 thru_hole circle (at -1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 109 FPGA_GPIO_B_2))
+ (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 110 FPGA_GPIO_B_3))
+ (pad 11 thru_hole circle (at -3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 12 thru_hole circle (at -3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 3 GND))
+ (pad 13 thru_hole circle (at -6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 111 FPGA_GPIO_B_4))
+ (pad 14 thru_hole circle (at -6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 112 FPGA_GPIO_B_5))
+ (pad 15 thru_hole circle (at -8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 113 FPGA_GPIO_B_6))
+ (pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (net 114 FPGA_GPIO_B_7))
+ (model wrlshp/pin_header_awl254-dg-g16d.wrl
+ (offset (xyz -0.006349999904632569 -0.03632199945449829 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 90 360 180))
+ )
+ (model wrlshp/B280C847-2543.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:NDY (layer B.Cu) (tedit 60BDD618) (tstamp 539EEDBF)
+ (at 22.2758 -78.2828)
+ (path /57D84708/580240B7)
+ (attr smd)
+ (fp_text reference U1 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value LMZ13608TZ/NOPB (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at -7.62 0) (layer B.Fab)
+ (effects (font (size 5 5) (thickness 0.5)) (justify mirror))
+ )
+ (fp_line (start 2.54 7.62) (end -16.51 7.62) (layer B.Fab) (width 0.1))
+ (fp_line (start -16.51 7.62) (end -16.51 -7.62) (layer B.Fab) (width 0.1))
+ (fp_line (start -16.51 -7.62) (end 2.54 -7.62) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.54 -7.62) (end 2.54 7.62) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 2.54 -7.62) (xy -2.54 -7.62) (xy -2.54 -5.08) (xy 2.54 -5.08)) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0 -6.35 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 202 PWR_18V))
+ (pad 2 smd rect (at 0 -5.08 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 202 PWR_18V))
+ (pad 3 smd rect (at 0 -3.81 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 4 smd rect (at 0 -2.54 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 189 "Net-(R3-Pad2)"))
+ (pad 5 smd rect (at 0 -1.27 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 6 smd rect (at 0 0 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 7 smd rect (at 0 1.27 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 190 "Net-(R8-Pad1)"))
+ (pad TP1 smd rect (at -9.525 0 90) (size 9.144 13.3858) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 8 smd rect (at 0 2.54 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 149 "Net-(C5-Pad1)"))
+ (pad 9 smd rect (at 0 3.81 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 270 "Net-(U1-Pad9)"))
+ (pad 10 smd rect (at 0 5.08 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (pad 11 smd rect (at 0 6.35 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ )
+
+ (module Cryptech_Alpha_Footprints:LQFP-48 (layer F.Cu) (tedit 60BDD4EE) (tstamp 539EEDBF)
+ (at 13.8186 -9.636 90)
+ (path /57D84CB3/58024000)
+ (attr smd)
+ (fp_text reference U8 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value FT232HL-REEL (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 4 4) (thickness 0.2)))
+ )
+ (fp_line (start -5.08 -5.08) (end 5.08 -5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start 5.08 -5.08) (end 5.08 5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start 5.08 5.08) (end -5.08 5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.08 5.08) (end -5.08 -5.08) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy -3.048 5.08) (xy -5.08 5.08) (xy -5.08 3.048) (xy -3.048 3.048)) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -2.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 155 "Net-(C75-Pad2)"))
+ (pad 2 smd rect (at -2.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 156 "Net-(C78-Pad2)"))
+ (pad 3 smd rect (at -1.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 142 FT_VPHY))
+ (pad 4 smd rect (at -1.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 5 smd rect (at -0.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 249 "/User USB UART/FT_REF"))
+ (pad 6 smd rect (at -0.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 233 "/User USB UART/USB_N"))
+ (pad 7 smd rect (at 0.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 234 "/User USB UART/USB_P"))
+ (pad 8 smd rect (at 0.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 143 FT_VPLL))
+ (pad 9 smd rect (at 1.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 10 smd rect (at 1.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 11 smd rect (at 2.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 12 smd rect (at 2.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 141 FT_VCC3V3))
+ (pad 13 smd rect (at 4.05 2.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 240 "/User USB UART/FT_TXD1"))
+ (pad 14 smd rect (at 4.05 2.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 239 "/User USB UART/FT_RXD1"))
+ (pad 15 smd rect (at 4.05 1.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 138 FT_RTS))
+ (pad 16 smd rect (at 4.05 1.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 127 FT_CTS))
+ (pad 17 smd rect (at 4.05 0.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 128 FT_DTR))
+ (pad 18 smd rect (at 4.05 0.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 316 "Net-(U8-Pad18)"))
+ (pad 19 smd rect (at 4.05 -0.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 317 "Net-(U8-Pad19)"))
+ (pad 20 smd rect (at 4.05 -0.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 318 "Net-(U8-Pad20)"))
+ (pad 21 smd rect (at 4.05 -1.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 319 "Net-(U8-Pad21)"))
+ (pad 22 smd rect (at 4.05 -1.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 23 smd rect (at 4.05 -2.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 24 smd rect (at 4.05 -2.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 141 FT_VCC3V3))
+ (pad 25 smd rect (at 2.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 320 "Net-(U8-Pad25)"))
+ (pad 26 smd rect (at 2.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 321 "Net-(U8-Pad26)"))
+ (pad 27 smd rect (at 1.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 322 "Net-(U8-Pad27)"))
+ (pad 28 smd rect (at 1.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 323 "Net-(U8-Pad28)"))
+ (pad 29 smd rect (at 0.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 324 "Net-(U8-Pad29)"))
+ (pad 30 smd rect (at 0.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 325 "Net-(U8-Pad30)"))
+ (pad 31 smd rect (at -0.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 326 "Net-(U8-Pad31)"))
+ (pad 32 smd rect (at -0.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 327 "Net-(U8-Pad32)"))
+ (pad 33 smd rect (at -1.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 328 "Net-(U8-Pad33)"))
+ (pad 34 smd rect (at -1.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 250 "/User USB UART/FT_RESET"))
+ (pad 35 smd rect (at -2.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 36 smd rect (at -2.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 37 smd rect (at -4.05 -2.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 218 "/User USB UART/FT_VCCA"))
+ (pad 38 smd rect (at -4.05 -2.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 217 "/User USB UART/FT_VCCORE"))
+ (pad 39 smd rect (at -4.05 -1.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 141 FT_VCC3V3))
+ (pad 40 smd rect (at -4.05 -1.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 144 FT_VREGIN))
+ (pad 41 smd rect (at -4.05 -0.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 42 smd rect (at -4.05 -0.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 43 smd rect (at -4.05 0.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 329 "Net-(U8-Pad43)"))
+ (pad 44 smd rect (at -4.05 0.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 330 "Net-(U8-Pad44)"))
+ (pad 45 smd rect (at -4.05 1.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 331 "Net-(U8-Pad45)"))
+ (pad 46 smd rect (at -4.05 1.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 141 FT_VCC3V3))
+ (pad 47 smd rect (at -4.05 2.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 48 smd rect (at -4.05 2.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model wrlshp/SW3dPS-LQFP48.wrl
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 0))
+ )
+ (model wrlshp/6B6B27F8-B7AC.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:LQFP-48 (layer F.Cu) (tedit 60BDD4EE) (tstamp 539EEDBF)
+ (at 86.3854 -17.8496)
+ (path /57D84E30/58023FCA)
+ (attr smd)
+ (fp_text reference U9 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value FT232HL-REEL (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 4 4) (thickness 0.2)))
+ )
+ (fp_line (start -5.08 -5.08) (end 5.08 -5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start 5.08 -5.08) (end 5.08 5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start 5.08 5.08) (end -5.08 5.08) (layer F.Fab) (width 0.1))
+ (fp_line (start -5.08 5.08) (end -5.08 -5.08) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy -3.048 5.08) (xy -5.08 5.08) (xy -5.08 3.048) (xy -3.048 3.048)) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -2.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 157 "Net-(C90-Pad2)"))
+ (pad 2 smd rect (at -2.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 158 "Net-(C93-Pad2)"))
+ (pad 3 smd rect (at -1.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 135 FT_MGMT_VPHY))
+ (pad 4 smd rect (at -1.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 5 smd rect (at -0.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 251 "/MGMT USB UART/FT_REF1"))
+ (pad 6 smd rect (at -0.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 235 "/MGMT USB UART/USB_MGMT_N"))
+ (pad 7 smd rect (at 0.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 236 "/MGMT USB UART/USB_MGMT_P"))
+ (pad 8 smd rect (at 0.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 136 FT_MGMT_VPLL))
+ (pad 9 smd rect (at 1.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 10 smd rect (at 1.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 11 smd rect (at 2.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 12 smd rect (at 2.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 134 FT_MGMT_VCC3V3))
+ (pad 13 smd rect (at 4.05 2.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 242 "/MGMT USB UART/FT_MGMT_TXD1"))
+ (pad 14 smd rect (at 4.05 2.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 241 "/MGMT USB UART/FT_MGMT_RXD1"))
+ (pad 15 smd rect (at 4.05 1.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 131 FT_MGMT_RTS))
+ (pad 16 smd rect (at 4.05 1.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 129 FT_MGMT_CTS))
+ (pad 17 smd rect (at 4.05 0.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 130 FT_MGMT_DTR))
+ (pad 18 smd rect (at 4.05 0.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 332 "Net-(U9-Pad18)"))
+ (pad 19 smd rect (at 4.05 -0.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 333 "Net-(U9-Pad19)"))
+ (pad 20 smd rect (at 4.05 -0.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 334 "Net-(U9-Pad20)"))
+ (pad 21 smd rect (at 4.05 -1.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 335 "Net-(U9-Pad21)"))
+ (pad 22 smd rect (at 4.05 -1.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 23 smd rect (at 4.05 -2.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 24 smd rect (at 4.05 -2.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 134 FT_MGMT_VCC3V3))
+ (pad 25 smd rect (at 2.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 336 "Net-(U9-Pad25)"))
+ (pad 26 smd rect (at 2.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 337 "Net-(U9-Pad26)"))
+ (pad 27 smd rect (at 1.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 338 "Net-(U9-Pad27)"))
+ (pad 28 smd rect (at 1.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 339 "Net-(U9-Pad28)"))
+ (pad 29 smd rect (at 0.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 340 "Net-(U9-Pad29)"))
+ (pad 30 smd rect (at 0.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 341 "Net-(U9-Pad30)"))
+ (pad 31 smd rect (at -0.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 342 "Net-(U9-Pad31)"))
+ (pad 32 smd rect (at -0.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 343 "Net-(U9-Pad32)"))
+ (pad 33 smd rect (at -1.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 344 "Net-(U9-Pad33)"))
+ (pad 34 smd rect (at -1.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 252 "/MGMT USB UART/FT_RESET1"))
+ (pad 35 smd rect (at -2.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 36 smd rect (at -2.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 37 smd rect (at -4.05 -2.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 220 "/MGMT USB UART/FT_VCCA1"))
+ (pad 38 smd rect (at -4.05 -2.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 219 "/MGMT USB UART/FT_VCCORE1"))
+ (pad 39 smd rect (at -4.05 -1.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 134 FT_MGMT_VCC3V3))
+ (pad 40 smd rect (at -4.05 -1.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 137 FT_MGMT_VREGIN))
+ (pad 41 smd rect (at -4.05 -0.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 42 smd rect (at -4.05 -0.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 43 smd rect (at -4.05 0.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 345 "Net-(U9-Pad43)"))
+ (pad 44 smd rect (at -4.05 0.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 346 "Net-(U9-Pad44)"))
+ (pad 45 smd rect (at -4.05 1.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 347 "Net-(U9-Pad45)"))
+ (pad 46 smd rect (at -4.05 1.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 134 FT_MGMT_VCC3V3))
+ (pad 47 smd rect (at -4.05 2.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 48 smd rect (at -4.05 2.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model wrlshp/SW3dPS-LQFP48.wrl
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 0))
+ )
+ (model wrlshp/6B6B27F8-B7AC.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:L_1206 (layer B.Cu) (tedit 60BDD442) (tstamp 539EEDBF)
+ (at 41.4528 -84.2772 270)
+ (path /57D853B0/58023F06)
+ (attr smd)
+ (fp_text reference FB5 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value BLM31PG330SN1 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.016 2.286) (end 1.016 2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.016 2.286) (end 1.016 -2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.016 -2.286) (end -1.016 -2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.016 -2.286) (end -1.016 2.286) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.4 270) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 125 FPGA_VCCAUX_1V8))
+ (pad 1 smd rect (at 0 1.4 270) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 161 "Net-(C117-Pad1)"))
+ (model "wrlshp/User Library-V1206HD.wrl"
+ (offset (xyz 0.05003799924850464 0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 270))
+ )
+ (model wrlshp/76148CD0-6DD3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:L_1206 (layer B.Cu) (tedit 60BDD442) (tstamp 539EEDBF)
+ (at 7.7978 -33.147 270)
+ (path /57D853B0/58023F14)
+ (attr smd)
+ (fp_text reference FB6 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value BLM31PG330SN1 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.016 2.286) (end 1.016 2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.016 2.286) (end 1.016 -2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.016 -2.286) (end -1.016 -2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.016 -2.286) (end -1.016 2.286) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.4 270) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 1 smd rect (at 0 1.4 270) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 163 "Net-(C118-Pad1)"))
+ (model "wrlshp/User Library-V1206HD.wrl"
+ (offset (xyz 0.05003799924850464 0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 270))
+ )
+ (model wrlshp/76148CD0-6DD3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:L_1206 (layer B.Cu) (tedit 60BDD442) (tstamp 539EEDBF)
+ (at 39.624 -58.2168)
+ (path /57D85A75/58023E22)
+ (attr smd)
+ (fp_text reference FB7 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value BLM31PG330SN1 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 -90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.016 2.286) (end 1.016 2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.016 2.286) (end 1.016 -2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.016 -2.286) (end -1.016 -2.286) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.016 -2.286) (end -1.016 2.286) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.4) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 1 smd rect (at 0 1.4) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (model "wrlshp/User Library-V1206HD.wrl"
+ (offset (xyz 0.05003799924850464 0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 270))
+ )
+ (model wrlshp/76148CD0-6DD3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:L_0603 (layer F.Cu) (tedit 60BDD397) (tstamp 539EEDBF)
+ (at 27.3512 -15.7226)
+ (path /57D84CB3/58023FF4)
+ (attr smd)
+ (fp_text reference FB1 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value FBMH1608HL601-T (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 142 FT_VPHY))
+ (pad 1 smd rect (at 0 -0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 141 FT_VCC3V3))
+ (model "wrlshp/User Library-V0603HD.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 90))
+ )
+ (model wrlshp/AF13F747-700F.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:L_0603 (layer F.Cu) (tedit 60BDD397) (tstamp 539EEDBF)
+ (at 20.7528 -14.9192 90)
+ (path /57D84CB3/58023FF6)
+ (attr smd)
+ (fp_text reference FB2 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value FBMH1608HL601-T (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.85 90) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 143 FT_VPLL))
+ (pad 1 smd rect (at 0 -0.85 90) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 141 FT_VCC3V3))
+ (model "wrlshp/User Library-V0603HD.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 90))
+ )
+ (model wrlshp/AF13F747-700F.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:L_0603 (layer F.Cu) (tedit 60BDD397) (tstamp 539EEDBF)
+ (at 93.218 -10.9662)
+ (path /57D84E30/58023FBE)
+ (attr smd)
+ (fp_text reference FB3 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value FBMH1608HL601-T (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 135 FT_MGMT_VPHY))
+ (pad 1 smd rect (at 0 -0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 134 FT_MGMT_VCC3V3))
+ (model "wrlshp/User Library-V0603HD.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 90))
+ )
+ (model wrlshp/AF13F747-700F.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:L_0603 (layer F.Cu) (tedit 60BDD397) (tstamp 539EEDBF)
+ (at 91.186 -10.9662)
+ (path /57D84E30/58023FC0)
+ (attr smd)
+ (fp_text reference FB4 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value FBMH1608HL601-T (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)))
+ )
+ (fp_line (start -0.762 -1.524) (end 0.762 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -1.524) (end 0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 1.524) (end -0.762 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 1.524) (end -0.762 -1.524) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 136 FT_MGMT_VPLL))
+ (pad 1 smd rect (at 0 -0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
+ (net 134 FT_MGMT_VCC3V3))
+ (model "wrlshp/User Library-V0603HD.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 360 360 90))
+ )
+ (model wrlshp/AF13F747-700F.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:HDR1X10 (layer F.Cu) (tedit 60BDD308) (tstamp 539EEDBF)
(at 31.5 6)
(path /57D84FAD/58023F9D)
(attr smd)
@@ -4198,6 +4781,14 @@
(fp_text value PLS-10 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 11.43 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_line (start -1.27 -1.27) (end -1.27 0) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 0) (end 0 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 0 1.27) (end 24.13 1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 24.13 1.27) (end 24.13 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start 24.13 -1.27) (end -1.27 -1.27) (layer F.Fab) (width 0.1))
(pad 3 thru_hole circle (at 5.08 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
(net 595 ICE40_GPIO_1))
(pad 10 thru_hole circle (at 22.86 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
@@ -4220,453 +4811,862 @@
(net 1 3V3_BATT))
)
- (module Cryptech_Alpha_Footprints:WE-SHC_36103205_NO_CREAM (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 83.82 -87.7454)
- (path /57D8488D/580240A2)
+ (module Cryptech_Alpha_Footprints:CRYSTAL_3.2X2.5 (layer F.Cu) (tedit 60BDD26D) (tstamp 539EEDBF)
+ (at 82.525 -8.8)
+ (path /57D84E30/58023FB6)
(attr smd)
- (fp_text reference S1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference Y2 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 36103205 (at 0 0) (layer Cmts.User)
+ (fp_text value ABM8G-12.000MHZ-4Y-T3 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 10.2616 -10.3886 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at -10.25 -10.3886 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at -10.25 7.83 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 10.2616 7.83 90) (size 3.302 1.016) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 9.1186 -11.5316 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at -9.1 -11.5316 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at -9.1 8.98 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 9.1186 8.98 90) (size 1.016 3.302) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 3.7592 -11.5316 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 3.7592 8.98 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at -3.75 8.98 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0.762) (layer F.Fab)
+ (effects (font (size 1.2 1.2) (thickness 0.1)))
+ )
+ (fp_line (start -2.286 -1.778) (end 2.286 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.286 -1.778) (end 2.286 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.286 1.778) (end -2.286 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.286 1.778) (end -2.286 -1.778) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 2.286 -0.254) (xy 0.508 -0.254) (xy 0.508 -1.778) (xy 2.286 -1.778)) (layer F.Fab) (width 0.1))
+ (pad 4 smd rect (at 1.1176 0.8636) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at -3.75 -11.5316 90) (size 1.016 2.6162) (layers B.Cu B.Paste B.Mask)
+ (pad 3 smd rect (at -1.0922 0.8636) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 157 "Net-(C90-Pad2)"))
+ (pad 2 smd rect (at -1.0922 -0.8382 180) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 10.2616 -5.0292 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 1.1176 -0.8382 180) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 158 "Net-(C93-Pad2)"))
+ )
+
+ (module Cryptech_Alpha_Footprints:CRYSTAL_3.2X2.5 (layer F.Cu) (tedit 60BDD26D) (tstamp 539EEDBF)
+ (at 23.075 -5.5 90)
+ (path /57D84CB3/58023FEC)
+ (attr smd)
+ (fp_text reference Y1 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value ABM8G-12.000MHZ-4Y-T3 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0.762 90) (layer F.Fab)
+ (effects (font (size 1.2 1.2) (thickness 0.1)))
+ )
+ (fp_line (start -2.286 -1.778) (end 2.286 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.286 -1.778) (end 2.286 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 2.286 1.778) (end -2.286 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -2.286 1.778) (end -2.286 -1.778) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 2.286 -0.254) (xy 0.508 -0.254) (xy 0.508 -1.778) (xy 2.286 -1.778)) (layer F.Fab) (width 0.1))
+ (pad 4 smd rect (at 1.1176 0.8636 90) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 10.2616 2.48 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
+ (pad 3 smd rect (at -1.0922 0.8636 90) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 155 "Net-(C75-Pad2)"))
+ (pad 2 smd rect (at -1.0922 -0.8382 270) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at -10.25 2.48 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 1.1176 -0.8382 270) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (net 156 "Net-(C78-Pad2)"))
+ )
+
+ (module Cryptech_Alpha_Footprints:CRYSTAL_3.2X2.5 (layer B.Cu) (tedit 60BDD26D) (tstamp 539EEDBF)
+ (at 28.3 -34.975)
+ (path /57D84936/58024088)
+ (attr smd)
+ (fp_text reference Q3 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)) (justify mirror))
+ )
+ (fp_text value ABM8G-25.000MHZ-4Y-T3 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 -0.762) (layer B.Fab)
+ (effects (font (size 1.2 1.2) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -2.286 1.778) (end 2.286 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.286 1.778) (end 2.286 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 2.286 -1.778) (end -2.286 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -2.286 -1.778) (end -2.286 1.778) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 2.286 0.254) (xy 0.508 0.254) (xy 0.508 1.778) (xy 2.286 1.778)) (layer B.Fab) (width 0.1))
+ (pad 4 smd rect (at 1.1176 -0.8636) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at -10.25 -5.0292 90) (size 2.6162 1.016) (layers B.Cu B.Paste B.Mask)
+ (pad 3 smd rect (at -1.0922 -0.8636) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
+ (net 213 "/STM32 configuration/OSC_OUT"))
+ (pad 2 smd rect (at -1.0922 0.8382 180) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
+ (pad 1 smd rect (at 1.1176 0.8382 180) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
+ (net 152 "Net-(C17-Pad2)"))
)
- (module Cryptech_Alpha_Footprints:TSSOP50P1180X120-86N (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 86.1704 -49.8264 180)
- (path /57D84B22/58024046)
+ (module Cryptech_Alpha_Footprints:C_D (layer B.Cu) (tedit 60BDD1BE) (tstamp 539EEDBF)
+ (at 10.4648 -54.5846)
+ (path /57D84708/580240B3)
(attr smd)
- (fp_text reference U5 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C9 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value IS45S32160F-*** (at 0 0) (layer Cmts.User)
+ (fp_text value 330uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd oval (at -5.75 -10.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd oval (at -5.75 -10 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 41 FMC_D0))
- (pad 3 smd oval (at -5.75 -9.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 4 smd oval (at -5.75 -9 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 42 FMC_D1))
- (pad 5 smd oval (at -5.75 -8.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 43 FMC_D2))
- (pad 6 smd oval (at -5.75 -8 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 7 smd oval (at -5.75 -7.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 44 FMC_D3))
- (pad 8 smd oval (at -5.75 -7 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 45 FMC_D4))
- (pad 9 smd oval (at -5.75 -6.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
- (pad 10 smd oval (at -5.75 -6 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 46 FMC_D5))
- (pad 11 smd oval (at -5.75 -5.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 47 FMC_D6))
- (pad 12 smd oval (at -5.75 -5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 13 smd oval (at -5.75 -4.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 48 FMC_D7))
- (pad 14 smd oval (at -5.75 -4 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
- (pad 15 smd oval (at -5.75 -3.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 16 smd oval (at -5.75 -3 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 73 FMC_NBL0))
- (pad 17 smd oval (at -5.75 -2.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 89 FMC_SDNWE))
- (pad 18 smd oval (at -5.75 -2 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 85 FMC_SDNCAS))
- (pad 19 smd oval (at -5.75 -1.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 88 FMC_SDNRAS))
- (pad 20 smd oval (at -5.75 -1 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 86 FMC_SDNE0))
- (pad 21 smd oval (at -5.75 -0.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 25 FMC_A11))
- (pad 22 smd oval (at -5.75 0 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 28 FMC_A14))
- (pad 23 smd oval (at -5.75 0.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 29 FMC_A15))
- (pad 24 smd oval (at -5.75 1 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 24 FMC_A10))
- (pad 25 smd oval (at -5.75 1.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 14 FMC_A0))
- (pad 26 smd oval (at -5.75 2 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 15 FMC_A1))
- (pad 27 smd oval (at -5.75 2.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 16 FMC_A2))
- (pad 28 smd oval (at -5.75 3 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 75 FMC_NBL2))
- (pad 29 smd oval (at -5.75 3.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 30 smd oval (at -5.75 4 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
- (pad 31 smd oval (at -5.75 4.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 57 FMC_D16))
- (pad 32 smd oval (at -5.75 5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 33 smd oval (at -5.75 5.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 58 FMC_D17))
- (pad 34 smd oval (at -5.75 6 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 59 FMC_D18))
- (pad 35 smd oval (at -5.75 6.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 36 smd oval (at -5.75 7 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 60 FMC_D19))
- (pad 37 smd oval (at -5.75 7.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 61 FMC_D20))
- (pad 38 smd oval (at -5.75 8 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at -0.254 0) (layer B.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -4.826 1.778) (end 4.826 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 4.826 1.778) (end 4.826 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 4.826 -1.778) (end -4.826 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -4.826 -1.778) (end -4.826 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 4.572 2.032) (end 4.572 3.048) (layer B.Fab) (width 0.1))
+ (fp_line (start 4.064 2.54) (end 5.08 2.54) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 4.826 -1.778) (xy 4.318 -1.778) (xy 4.318 1.778) (xy 4.826 1.778)) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 39 smd oval (at -5.75 8.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 62 FMC_D21))
- (pad 40 smd oval (at -5.75 9 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 63 FMC_D22))
- (pad 41 smd oval (at -5.75 9.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 42 smd oval (at -5.75 10 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 64 FMC_D23))
- (pad 43 smd oval (at -5.75 10.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 86 smd oval (at 5.75 -10.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model wrlshp/SW3dPS-cap_d.wrl
+ (offset (xyz -0.05003799924850464 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/5917D381-109F.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_D (layer B.Cu) (tedit 60BDD1BE) (tstamp 539EEDBF)
+ (at 10.4648 -61.0616)
+ (path /57D84708/580240B2)
+ (attr smd)
+ (fp_text reference C10 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at -0.254 0) (layer B.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -4.826 1.778) (end 4.826 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 4.826 1.778) (end 4.826 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 4.826 -1.778) (end -4.826 -1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start -4.826 -1.778) (end -4.826 1.778) (layer B.Fab) (width 0.1))
+ (fp_line (start 4.572 2.032) (end 4.572 3.048) (layer B.Fab) (width 0.1))
+ (fp_line (start 4.064 2.54) (end 5.08 2.54) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 4.826 -1.778) (xy 4.318 -1.778) (xy 4.318 1.778) (xy 4.826 1.778)) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 85 smd oval (at 5.75 -10 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 56 FMC_D15))
- (pad 84 smd oval (at 5.75 -9.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model wrlshp/SW3dPS-cap_d.wrl
+ (offset (xyz -0.05003799924850464 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/5917D381-109F.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_D (layer F.Cu) (tedit 60BDD1BE) (tstamp 539EEDBF)
+ (at 79.7052 -71.501 270)
+ (path /57D855DE/58023E8E)
+ (attr smd)
+ (fp_text reference C123 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at -0.254 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -4.826 -1.778) (end 4.826 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.826 -1.778) (end 4.826 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.826 1.778) (end -4.826 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.826 1.778) (end -4.826 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.572 -2.032) (end 4.572 -3.048) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.064 -2.54) (end 5.08 -2.54) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 4.826 1.778) (xy 4.318 1.778) (xy 4.318 -1.778) (xy 4.826 -1.778)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at -3.25 0 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 83 smd oval (at 5.75 -9 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 55 FMC_D14))
- (pad 82 smd oval (at 5.75 -8.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 54 FMC_D13))
- (pad 81 smd oval (at 5.75 -8 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 80 smd oval (at 5.75 -7.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 53 FMC_D12))
- (pad 79 smd oval (at 5.75 -7 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 52 FMC_D11))
- (pad 78 smd oval (at 5.75 -6.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 3.25 0 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (model wrlshp/SW3dPS-cap_d.wrl
+ (offset (xyz -0.05003799924850464 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/5917D381-109F.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_D (layer F.Cu) (tedit 60BDD1BE) (tstamp 539EEDBF)
+ (at 54.8754 -90.997)
+ (path /57D855DE/58023E8D)
+ (attr smd)
+ (fp_text reference C127 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at -0.254 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -4.826 -1.778) (end 4.826 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.826 -1.778) (end 4.826 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.826 1.778) (end -4.826 1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start -4.826 1.778) (end -4.826 -1.778) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.572 -2.032) (end 4.572 -3.048) (layer F.Fab) (width 0.1))
+ (fp_line (start 4.064 -2.54) (end 5.08 -2.54) (layer F.Fab) (width 0.1))
+ (fp_poly (pts (xy 4.826 1.778) (xy 4.318 1.778) (xy 4.318 -1.778) (xy 4.826 -1.778)) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 77 smd oval (at 5.75 -6 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 51 FMC_D10))
- (pad 76 smd oval (at 5.75 -5.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 50 FMC_D9))
- (pad 75 smd oval (at 5.75 -5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 74 smd oval (at 5.75 -4.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 49 FMC_D8))
- (pad 73 smd oval (at 5.75 -4 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
- (pad 72 smd oval (at 5.75 -3.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (model wrlshp/SW3dPS-cap_d.wrl
+ (offset (xyz -0.05003799924850464 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/5917D381-109F.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 21.463 -99.0854 270)
+ (path /57D84708/580240AD)
+ (attr smd)
+ (fp_text reference C1 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 71 smd oval (at 5.75 -3 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 74 FMC_NBL1))
- (pad 70 smd oval (at 5.75 -2.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
- (pad 69 smd oval (at 5.75 -2 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 26 FMC_A12))
- (pad 68 smd oval (at 5.75 -1.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 84 FMC_SDCLK))
- (pad 67 smd oval (at 5.75 -1 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 82 FMC_SDCKE0))
- (pad 66 smd oval (at 5.75 -0.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 23 FMC_A9))
- (pad 65 smd oval (at 5.75 0 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 22 FMC_A8))
- (pad 64 smd oval (at 5.75 0.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 21 FMC_A7))
- (pad 63 smd oval (at 5.75 1 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 20 FMC_A6))
- (pad 62 smd oval (at 5.75 1.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 19 FMC_A5))
- (pad 61 smd oval (at 5.75 2 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 18 FMC_A4))
- (pad 60 smd oval (at 5.75 2.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 17 FMC_A3))
- (pad 59 smd oval (at 5.75 3 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 76 FMC_NBL3))
- (pad 58 smd oval (at 5.75 3.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 202 PWR_18V))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 21.463 -94.0689 270)
+ (path /57D84708/580240C1)
+ (attr smd)
+ (fp_text reference C2 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 57 smd oval (at 5.75 4 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask))
- (pad 56 smd oval (at 5.75 4.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 72 FMC_D31))
- (pad 55 smd oval (at 5.75 5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 54 smd oval (at 5.75 5.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 71 FMC_D30))
- (pad 53 smd oval (at 5.75 6 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 70 FMC_D29))
- (pad 52 smd oval (at 5.75 6.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 202 PWR_18V))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 21.463 -89.0524 270)
+ (path /57D84708/580240C0)
+ (attr smd)
+ (fp_text reference C3 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 51 smd oval (at 5.75 7 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 69 FMC_D28))
- (pad 50 smd oval (at 5.75 7.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 68 FMC_D27))
- (pad 49 smd oval (at 5.75 8 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 48 smd oval (at 5.75 8.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 67 FMC_D26))
- (pad 47 smd oval (at 5.75 9 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 66 FMC_D25))
- (pad 46 smd oval (at 5.75 9.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 202 PWR_18V))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 15.2908 -67.3354 90)
+ (path /57D84708/580240BF)
+ (attr smd)
+ (fp_text reference C8 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5 180) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 45 smd oval (at 5.75 10 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
- (net 65 FMC_D24))
- (pad 44 smd oval (at 5.75 10.5 270) (size 0.3 1.2) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 0 1.5 180) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 40.0558 -72.6186)
+ (path /57D853B0/58023F19)
+ (attr smd)
+ (fp_text reference C113 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 22uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 -90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (model wrlshp/D87FE1D2-D8B7.wrl
+ (pad 1 smd rect (at 0 1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
+ (rotate (xyz 0 0 180))
)
)
- (module Cryptech_Alpha_Footprints:TSSOP50P1180X120-86N (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 80.6704 -49.8264)
- (path /57D84B22/58024042)
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 6.4008 -44.9326 180)
+ (path /57D853B0/58023F05)
(attr smd)
- (fp_text reference U6 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C114 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value IS45S32160F-*** (at 0 0) (layer Cmts.User)
+ (fp_text value 22uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd oval (at -5.75 10.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd oval (at -5.75 10 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 41 FMC_D0))
- (pad 3 smd oval (at -5.75 9.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 4 smd oval (at -5.75 9 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 42 FMC_D1))
- (pad 5 smd oval (at -5.75 8.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 43 FMC_D2))
- (pad 6 smd oval (at -5.75 8 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 7 smd oval (at -5.75 7.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 44 FMC_D3))
- (pad 8 smd oval (at -5.75 7 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 45 FMC_D4))
- (pad 9 smd oval (at -5.75 6.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
- (pad 10 smd oval (at -5.75 6 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 46 FMC_D5))
- (pad 11 smd oval (at -5.75 5.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 47 FMC_D6))
- (pad 12 smd oval (at -5.75 5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 40.0558 -79.4004 180)
+ (path /57D853B0/58023F0F)
+ (attr smd)
+ (fp_text reference C119 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 13 smd oval (at -5.75 4.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 48 FMC_D7))
- (pad 14 smd oval (at -5.75 4 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
- (pad 15 smd oval (at -5.75 3.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 16 smd oval (at -5.75 3 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 73 FMC_NBL0))
- (pad 17 smd oval (at -5.75 2.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 89 FMC_SDNWE))
- (pad 18 smd oval (at -5.75 2 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 85 FMC_SDNCAS))
- (pad 19 smd oval (at -5.75 1.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 88 FMC_SDNRAS))
- (pad 20 smd oval (at -5.75 1 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 87 FMC_SDNE1))
- (pad 21 smd oval (at -5.75 0.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 25 FMC_A11))
- (pad 22 smd oval (at -5.75 0 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 28 FMC_A14))
- (pad 23 smd oval (at -5.75 -0.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 29 FMC_A15))
- (pad 24 smd oval (at -5.75 -1 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 24 FMC_A10))
- (pad 25 smd oval (at -5.75 -1.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 14 FMC_A0))
- (pad 26 smd oval (at -5.75 -2 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 15 FMC_A1))
- (pad 27 smd oval (at -5.75 -2.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 16 FMC_A2))
- (pad 28 smd oval (at -5.75 -3 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 75 FMC_NBL2))
- (pad 29 smd oval (at -5.75 -3.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 30 smd oval (at -5.75 -4 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
- (pad 31 smd oval (at -5.75 -4.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 57 FMC_D16))
- (pad 32 smd oval (at -5.75 -5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 161 "Net-(C117-Pad1)"))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 6.4008 -38.5826)
+ (path /57D853B0/58023F0D)
+ (attr smd)
+ (fp_text reference C120 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 -90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 33 smd oval (at -5.75 -5.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 58 FMC_D17))
- (pad 34 smd oval (at -5.75 -6 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 59 FMC_D18))
- (pad 35 smd oval (at -5.75 -6.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 36 smd oval (at -5.75 -7 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 60 FMC_D19))
- (pad 37 smd oval (at -5.75 -7.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 61 FMC_D20))
- (pad 38 smd oval (at -5.75 -8 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 163 "Net-(C118-Pad1)"))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 47.9298 -84.5566 180)
+ (path /57D855DE/58023E8F)
+ (attr smd)
+ (fp_text reference C126 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_line (start -1.524 -2.54) (end 1.524 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end 1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end -1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 2.54) (end -1.524 -2.54) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 1.5 90) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 39 smd oval (at -5.75 -8.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 62 FMC_D21))
- (pad 40 smd oval (at -5.75 -9 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 63 FMC_D22))
- (pad 41 smd oval (at -5.75 -9.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 42 smd oval (at -5.75 -10 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 64 FMC_D23))
- (pad 43 smd oval (at -5.75 -10.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 86 smd oval (at 5.75 10.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 -1.5 90) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 125 FPGA_VCCAUX_1V8))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 42.8498 -56.09135)
+ (path /57D855DE/58023E9B)
+ (attr smd)
+ (fp_text reference C133 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_line (start -1.524 -2.54) (end 1.524 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end 1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end -1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 2.54) (end -1.524 -2.54) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 85 smd oval (at 5.75 10 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 56 FMC_D15))
- (pad 84 smd oval (at 5.75 9.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 74.5236 -65.8114)
+ (path /57D855DE/58023E91)
+ (attr smd)
+ (fp_text reference C137 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_line (start -1.524 -2.54) (end 1.524 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end 1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end -1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 2.54) (end -1.524 -2.54) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 83 smd oval (at 5.75 9 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 55 FMC_D14))
- (pad 82 smd oval (at 5.75 8.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 54 FMC_D13))
- (pad 81 smd oval (at 5.75 8 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 80 smd oval (at 5.75 7.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 53 FMC_D12))
- (pad 79 smd oval (at 5.75 7 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 52 FMC_D11))
- (pad 78 smd oval (at 5.75 6.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 63.7794 -85.0646 270)
+ (path /57D8583B/58023E40)
+ (attr smd)
+ (fp_text reference C165 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_line (start -1.524 -2.54) (end 1.524 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end 1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end -1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 2.54) (end -1.524 -2.54) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 1.5 180) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 77 smd oval (at 5.75 6 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 51 FMC_D10))
- (pad 76 smd oval (at 5.75 5.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 50 FMC_D9))
- (pad 75 smd oval (at 5.75 5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 -1.5 180) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
- (pad 74 smd oval (at 5.75 4.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 49 FMC_D8))
- (pad 73 smd oval (at 5.75 4 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
- (pad 72 smd oval (at 5.75 3.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 71 smd oval (at 5.75 3 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 74 FMC_NBL1))
- (pad 70 smd oval (at 5.75 2.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
- (pad 69 smd oval (at 5.75 2 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 26 FMC_A12))
- (pad 68 smd oval (at 5.75 1.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 84 FMC_SDCLK))
- (pad 67 smd oval (at 5.75 1 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 83 FMC_SDCKE1))
- (pad 66 smd oval (at 5.75 0.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 23 FMC_A9))
- (pad 65 smd oval (at 5.75 0 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 22 FMC_A8))
- (pad 64 smd oval (at 5.75 -0.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 21 FMC_A7))
- (pad 63 smd oval (at 5.75 -1 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 20 FMC_A6))
- (pad 62 smd oval (at 5.75 -1.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 19 FMC_A5))
- (pad 61 smd oval (at 5.75 -2 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 18 FMC_A4))
- (pad 60 smd oval (at 5.75 -2.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 17 FMC_A3))
- (pad 59 smd oval (at 5.75 -3 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 76 FMC_NBL3))
- (pad 58 smd oval (at 5.75 -3.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 68.834 -54.383)
+ (path /57D8583B/58023E3E)
+ (attr smd)
+ (fp_text reference C167 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_line (start -1.524 -2.54) (end 1.524 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end 1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end -1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 2.54) (end -1.524 -2.54) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 57 smd oval (at 5.75 -4 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask))
- (pad 56 smd oval (at 5.75 -4.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 72 FMC_D31))
- (pad 55 smd oval (at 5.75 -5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
- (pad 54 smd oval (at 5.75 -5.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 71 FMC_D30))
- (pad 53 smd oval (at 5.75 -6 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 70 FMC_D29))
- (pad 52 smd oval (at 5.75 -6.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 73.0758 -75.9714)
+ (path /57D8583B/58023E3C)
+ (attr smd)
+ (fp_text reference C168 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_line (start -1.524 -2.54) (end 1.524 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end 1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end -1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 2.54) (end -1.524 -2.54) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 51 smd oval (at 5.75 -7 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 69 FMC_D28))
- (pad 50 smd oval (at 5.75 -7.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 68 FMC_D27))
- (pad 49 smd oval (at 5.75 -8 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
- (pad 48 smd oval (at 5.75 -8.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 67 FMC_D26))
- (pad 47 smd oval (at 5.75 -9 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 66 FMC_D25))
- (pad 46 smd oval (at 5.75 -9.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 45 smd oval (at 5.75 -10 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
- (net 65 FMC_D24))
- (pad 44 smd oval (at 5.75 -10.5 270) (size 0.3 1.2) (layers B.Cu B.Paste B.Mask)
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 22.0472 -50.6476 270)
+ (path /57D85A75/58023E27)
+ (attr smd)
+ (fp_text reference C205 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 22uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (model wrlshp/D87FE1D2-D8B7.wrl
+ (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
+ (rotate (xyz 0 0 180))
)
)
- (module Cryptech_Alpha_Footprints:NDY (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 22.2758 -78.2828)
- (path /57D84708/580240B7)
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 22.0472 -46.2788 270)
+ (path /57D85A75/58023E26)
(attr smd)
- (fp_text reference U1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C206 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LMZ13608TZ/NOPB (at 0 0) (layer Cmts.User)
+ (fp_text value 22uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0 -6.35 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
- (net 202 PWR_18V))
- (pad 2 smd rect (at 0 -5.08 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
- (net 202 PWR_18V))
- (pad 3 smd rect (at 0 -3.81 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 4 smd rect (at 0 -2.54 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
- (net 189 "Net-(R3-Pad2)"))
- (pad 5 smd rect (at 0 -1.27 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 34.6964 -55.3466 180)
+ (path /57D85A75/58023E2B)
+ (attr smd)
+ (fp_text reference C209 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 6 smd rect (at 0 0 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 34.7472 -62.4078)
+ (path /57D85A75/58023E2A)
+ (attr smd)
+ (fp_text reference C210 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 -90) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.524 2.54) (end 1.524 2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end 1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end -1.524 -2.54) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.524 -2.54) (end -1.524 2.54) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 7 smd rect (at 0 1.27 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
- (net 190 "Net-(R8-Pad1)"))
- (pad TP1 smd rect (at -9.525 0 90) (size 9.144 13.3858) (layers B.Cu B.Paste B.Mask)
+ (pad 1 smd rect (at 0 1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 60BDCE00) (tstamp 539EEDBF)
+ (at 42.291 -85.6996 270)
+ (path /57D8583B/58023E3F)
+ (attr smd)
+ (fp_text reference C166 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 47uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_line (start -1.524 -2.54) (end 1.524 -2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 -2.54) (end 1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.524 2.54) (end -1.524 2.54) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.524 2.54) (end -1.524 -2.54) (layer F.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 1.5 180) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 8 smd rect (at 0 2.54 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
- (net 149 "Net-(C5-Pad1)"))
- (pad 9 smd rect (at 0 3.81 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
- (net 270 "Net-(U1-Pad9)"))
- (pad 10 smd rect (at 0 5.08 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 11 smd rect (at 0 6.35 180) (size 2.413 0.8636) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
+ (pad 1 smd rect (at 0 -1.5 180) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model wrlshp/SW3dPS-CAPC3225.wrl
+ (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/F26EE9BE-B6B0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
)
- (module Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:BGA484C100P22X22_2300X2300X254 (layer B.Cu) (tedit 60BDCD8B) (tstamp 539EEDBF)
(at 56.4534 -68.8848)
(path /57D85134/58023F60)
(attr smd)
@@ -4676,6 +5676,14 @@
(fp_text value XC7A200T-1FBG484C (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 5 5) (thickness 0.5)) (justify mirror))
+ )
+ (fp_line (start -10.922 10.922) (end 10.922 10.922) (layer B.Fab) (width 0.1))
+ (fp_line (start 10.922 10.922) (end 10.922 -10.922) (layer B.Fab) (width 0.1))
+ (fp_line (start 10.922 -10.922) (end -10.922 -10.922) (layer B.Fab) (width 0.1))
+ (fp_line (start -10.922 -10.922) (end -10.922 10.922) (layer B.Fab) (width 0.1))
+ (fp_poly (pts (xy 10.922 -10.922) (xy 9.906 -10.922) (xy 9.906 -9.906) (xy 10.922 -9.906)) (layer B.Fab) (width 0.1))
(pad AB22 smd circle (at -10.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
(net 34 FMC_A20))
(pad AB21 smd circle (at -9.5 10.5 180) (size 0.45 0.45) (layers B.Cu B.Paste B.Mask)
@@ -5651,1356 +6659,1590 @@
)
)
- (module Cryptech_Alpha_Footprints:SO20W (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 39.356 -38.3524 90)
- (path /57D85260/58023F40)
+ (module Cryptech_Alpha_Footprints:ASF (layer B.Cu) (tedit 60BDCC8E) (tstamp 539EEDBF)
+ (at 67.9704 -84.709)
+ (path /57D85260/58023F3D)
(attr smd)
- (fp_text reference IC2 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference Q5 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value MC74AC244DW* (at 0 0 90) (layer Cmts.User)
+ (fp_text value ASFL1-50.000MHZ-EK-T (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 11 smd rect (at 5.715 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 90 FPGA_CFG_CS_N))
- (pad 12 smd rect (at 4.445 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 6 ARM_FPGA_CFG_MISO))
- (pad 10 smd rect (at 5.715 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 9 smd rect (at 4.445 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 226 "/Config memory/FPGA_PROM_CS_N"))
- (pad 20 smd rect (at -5.715 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0.762) (layer B.Fab)
+ (effects (font (size 1.2 1.2) (thickness 0.15)) (justify mirror))
+ )
+ (fp_line (start -2.032 2.286) (end 2.032 2.286) (layer B.Fab) (width 0.12))
+ (fp_line (start 2.032 2.286) (end 2.032 -2.286) (layer B.Fab) (width 0.12))
+ (fp_line (start 2.032 -2.286) (end -2.032 -2.286) (layer B.Fab) (width 0.12))
+ (fp_line (start -2.032 -2.286) (end -2.032 2.286) (layer B.Fab) (width 0.12))
+ (fp_poly (pts (xy 2.032 -2.286) (xy 0.508 -2.286) (xy 0.508 -0.508) (xy 2.032 -0.508)) (layer B.Fab) (width 0.1))
+ (pad 4 smd rect (at -1.0922 -1.2524 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
- (pad 19 smd rect (at -4.445 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 227 "/Config memory/SPI_B_TRISTATE"))
- (pad 18 smd rect (at -3.175 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 226 "/Config memory/FPGA_PROM_CS_N"))
- (pad 17 smd rect (at -1.905 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 228 "/Config memory/FPGA_PROM_MISO"))
- (pad 16 smd rect (at -0.635 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 229 "/Config memory/FPGA_PROM_SCLK"))
- (pad 15 smd rect (at 0.635 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 94 FPGA_CFG_MOSI))
- (pad 14 smd rect (at 1.905 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 230 "/Config memory/FPGA_PROM_MOSI"))
- (pad 13 smd rect (at 3.175 -5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 95 FPGA_CFG_SCLK))
- (pad 8 smd rect (at 3.175 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 228 "/Config memory/FPGA_PROM_MISO"))
- (pad 7 smd rect (at 1.905 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 229 "/Config memory/FPGA_PROM_SCLK"))
- (pad 6 smd rect (at 0.635 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 7 ARM_FPGA_CFG_MOSI))
- (pad 5 smd rect (at -0.635 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 230 "/Config memory/FPGA_PROM_MOSI"))
- (pad 4 smd rect (at -1.905 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 8 ARM_FPGA_CFG_SCLK))
- (pad 3 smd rect (at -3.175 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 93 FPGA_CFG_MISO))
- (pad 2 smd rect (at -4.445 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 5 ARM_FPGA_CFG_CS_N))
- (pad 1 smd rect (at -5.715 5.0292 90) (size 0.6604 2.032) (layers F.Cu F.Paste F.Mask)
- (net 231 "/Config memory/SPI_A_TRISTATE"))
+ (pad 3 smd rect (at -1.0922 1.2954 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ (net 187 "Net-(Q5-Pad3)"))
+ (pad 1 smd rect (at 1.1302 -1.2524 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ (net 186 "Net-(Q5-Pad1)"))
+ (pad 2 smd rect (at 1.1302 1.2954 270) (size 1.7018 1.4986) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
)
- (module Cryptech_Alpha_Footprints:LQFP-48 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 13.8186 -9.636 90)
- (path /57D84CB3/58024000)
+ (module Cryptech_Alpha_Footprints:SOT95P280X100-5N (layer F.Cu) (tedit 60BD3E3A) (tstamp 5F036F55)
+ (at 71.1 -27.7)
+ (path /57D8509E/5F0932AD)
+ (fp_text reference U12 (at 1.755545 -3.587435) (layer F.SilkS)
+ (effects (font (size 1.642764 1.642764) (thickness 0.015)))
+ )
+ (fp_text value ADP121-AUJZ25R7 (at 13.23165 3.409705) (layer F.Fab) hide
+ (effects (font (size 1.642937 1.642937) (thickness 0.015)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_text user Name (at 0.71248 -3.587855) (layer Dwgs.User) hide
+ (effects (font (size 1.642953 1.642953) (thickness 0.015)))
+ )
+ (fp_arc (start 0 -1.446774) (end -0.1778 -1.2192) (angle -76) (layer F.SilkS) (width 0.1524))
+ (fp_arc (start 0 -1.4478) (end -0.3048 -1.4478) (angle -180) (layer F.Fab) (width 0.1))
+ (fp_arc (start 0 -1.4478) (end -0.3048 -1.4478) (angle -180) (layer F.SilkS) (width 0.1524))
+ (fp_line (start -1.905 -1.524) (end 1.905 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.905 -1.524) (end 1.905 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.905 1.524) (end -1.905 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.905 1.524) (end -1.905 -1.524) (layer F.Fab) (width 0.1))
+ (pad 5 smd rect (at 1.2192 -0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 572 "/Master Key Memory/MKM_VPP"))
+ (pad 4 smd rect (at 1.2192 0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 575 "Net-(U12-Pad4)"))
+ (pad 3 smd rect (at -1.2192 0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (pad 2 smd rect (at -1.2192 0) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -1.2192 -0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ )
+
+ (module Cryptech_Alpha_Footprints:SOT95P280X100-5N (layer F.Cu) (tedit 60BD3E3A) (tstamp 5F036E6C)
+ (at 71.1 -30.9)
+ (path /57D8509E/5F031C66)
+ (fp_text reference U10 (at 1.755545 -3.587435) (layer F.SilkS)
+ (effects (font (size 1.642764 1.642764) (thickness 0.015)))
+ )
+ (fp_text value ADP121-AUJZ12R7 (at 13.23165 3.409705) (layer F.Fab) hide
+ (effects (font (size 1.642937 1.642937) (thickness 0.015)))
+ )
+ (fp_text user %R (at 0 0 270) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_text user Name (at 0.71248 -3.587855) (layer Dwgs.User) hide
+ (effects (font (size 1.642953 1.642953) (thickness 0.015)))
+ )
+ (fp_arc (start 0 -1.446774) (end -0.1778 -1.2192) (angle -76) (layer F.SilkS) (width 0.1524))
+ (fp_arc (start 0 -1.4478) (end -0.3048 -1.4478) (angle -180) (layer F.Fab) (width 0.1))
+ (fp_arc (start 0 -1.4478) (end -0.3048 -1.4478) (angle -180) (layer F.SilkS) (width 0.1524))
+ (fp_line (start -1.905 -1.524) (end 1.905 -1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.905 -1.524) (end 1.905 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.905 1.524) (end -1.905 1.524) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.905 1.524) (end -1.905 -1.524) (layer F.Fab) (width 0.1))
+ (pad 5 smd rect (at 1.2192 -0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (pad 4 smd rect (at 1.2192 0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 574 "Net-(U10-Pad4)"))
+ (pad 3 smd rect (at -1.2192 0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (pad 2 smd rect (at -1.2192 0) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at -1.2192 -0.9398) (size 1.2192 0.508) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ )
+
+ (module Cryptech_Alpha_Footprints:694106301002 (layer F.Cu) (tedit 60BDC87E) (tstamp 539EEDBF)
+ (at 20 18.4)
+ (path /57D84708/580240B4)
(attr smd)
- (fp_text reference U8 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference JP1 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value FT232HL-REEL (at 0 0 90) (layer Cmts.User)
+ (fp_text value 694106301002 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at -2.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 155 "Net-(C75-Pad2)"))
- (pad 2 smd rect (at -2.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 156 "Net-(C78-Pad2)"))
- (pad 3 smd rect (at -1.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 142 FT_VPHY))
- (pad 4 smd rect (at -1.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 5 smd rect (at -0.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 249 "/User USB UART/FT_REF"))
- (pad 6 smd rect (at -0.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 233 "/User USB UART/USB_N"))
- (pad 7 smd rect (at 0.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 234 "/User USB UART/USB_P"))
- (pad 8 smd rect (at 0.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 143 FT_VPLL))
- (pad 9 smd rect (at 1.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 10 smd rect (at 1.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 11 smd rect (at 2.25 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 12 smd rect (at 2.75 4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 141 FT_VCC3V3))
- (pad 13 smd rect (at 4.05 2.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 240 "/User USB UART/FT_TXD1"))
- (pad 14 smd rect (at 4.05 2.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 239 "/User USB UART/FT_RXD1"))
- (pad 15 smd rect (at 4.05 1.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 138 FT_RTS))
- (pad 16 smd rect (at 4.05 1.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 127 FT_CTS))
- (pad 17 smd rect (at 4.05 0.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 128 FT_DTR))
- (pad 18 smd rect (at 4.05 0.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 316 "Net-(U8-Pad18)"))
- (pad 19 smd rect (at 4.05 -0.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 317 "Net-(U8-Pad19)"))
- (pad 20 smd rect (at 4.05 -0.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 318 "Net-(U8-Pad20)"))
- (pad 21 smd rect (at 4.05 -1.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 319 "Net-(U8-Pad21)"))
- (pad 22 smd rect (at 4.05 -1.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 23 smd rect (at 4.05 -2.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 24 smd rect (at 4.05 -2.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 141 FT_VCC3V3))
- (pad 25 smd rect (at 2.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 320 "Net-(U8-Pad25)"))
- (pad 26 smd rect (at 2.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 321 "Net-(U8-Pad26)"))
- (pad 27 smd rect (at 1.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 322 "Net-(U8-Pad27)"))
- (pad 28 smd rect (at 1.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 323 "Net-(U8-Pad28)"))
- (pad 29 smd rect (at 0.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 324 "Net-(U8-Pad29)"))
- (pad 30 smd rect (at 0.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 325 "Net-(U8-Pad30)"))
- (pad 31 smd rect (at -0.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 326 "Net-(U8-Pad31)"))
- (pad 32 smd rect (at -0.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 327 "Net-(U8-Pad32)"))
- (pad 33 smd rect (at -1.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 328 "Net-(U8-Pad33)"))
- (pad 34 smd rect (at -1.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 250 "/User USB UART/FT_RESET"))
- (pad 35 smd rect (at -2.25 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 36 smd rect (at -2.75 -4.05 270) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 37 smd rect (at -4.05 -2.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 218 "/User USB UART/FT_VCCA"))
- (pad 38 smd rect (at -4.05 -2.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 217 "/User USB UART/FT_VCCORE"))
- (pad 39 smd rect (at -4.05 -1.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 141 FT_VCC3V3))
- (pad 40 smd rect (at -4.05 -1.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 144 FT_VREGIN))
- (pad 41 smd rect (at -4.05 -0.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 42 smd rect (at -4.05 -0.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 43 smd rect (at -4.05 0.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 329 "Net-(U8-Pad43)"))
- (pad 44 smd rect (at -4.05 0.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 330 "Net-(U8-Pad44)"))
- (pad 45 smd rect (at -4.05 1.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 331 "Net-(U8-Pad45)"))
- (pad 46 smd rect (at -4.05 1.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 141 FT_VCC3V3))
- (pad 47 smd rect (at -4.05 2.25 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 -6.7 90) (layer F.Fab)
+ (effects (font (size 5 5) (thickness 0.5)))
+ )
+ (fp_line (start -4.8 -13.6) (end 4.8 -13.6) (layer F.Fab) (width 0.12))
+ (fp_line (start 4.8 -13.6) (end 4.8 0) (layer F.Fab) (width 0.12))
+ (fp_line (start 4.8 0) (end -4.8 0) (layer F.Fab) (width 0.12))
+ (fp_line (start -4.8 0) (end -4.8 -13.6) (layer F.Fab) (width 0.12))
+ (pad 3 thru_hole oval (at 4.8 -10.6 90) (size 4.5 2) (drill oval 3 0.8) (layers *.Cu *.Paste *.Mask)
(net 3 GND))
- (pad 48 smd rect (at -4.05 2.75 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (pad 2 thru_hole oval (at 0 -7.8 90) (size 2 4.5) (drill oval 0.8 3) (layers *.Cu *.Paste *.Mask)
(net 3 GND))
- (model wrlshp/SW3dPS-LQFP48.wrl
- (at (xyz 0 -0 0))
+ (pad 1 thru_hole oval (at 0 -13.6 90) (size 2 4.5) (drill oval 0.8 3) (layers *.Cu *.Paste *.Mask)
+ (net 202 PWR_18V))
+ (model wrlshp/PJ-002A.wrl
+ (offset (xyz 0.0551179991722107 -0.01193799982070923 6.499999602379799))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 0))
+ (rotate (xyz 90 180 270))
)
- (model wrlshp/6B6B27F8-B7AC.wrl
+ (model wrlshp/51D2E761-0F4D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 180))
)
)
- (module Cryptech_Alpha_Footprints:LQFP-48 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 86.3854 -17.8496)
- (path /57D84E30/58023FCA)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 5F035EDF)
+ (at 86.2 -27.5 270)
+ (path /57D8509E/5F05B071)
(attr smd)
- (fp_text reference U9 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text reference C107 (at 1.846 -1.43 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
)
- (fp_text value FT232HL-REEL (at 0 0) (layer Cmts.User)
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at -2.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 157 "Net-(C90-Pad2)"))
- (pad 2 smd rect (at -2.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 158 "Net-(C93-Pad2)"))
- (pad 3 smd rect (at -1.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 135 FT_MGMT_VPHY))
- (pad 4 smd rect (at -1.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 5 smd rect (at -0.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 251 "/MGMT USB UART/FT_REF1"))
- (pad 6 smd rect (at -0.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 235 "/MGMT USB UART/USB_MGMT_N"))
- (pad 7 smd rect (at 0.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 236 "/MGMT USB UART/USB_MGMT_P"))
- (pad 8 smd rect (at 0.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 136 FT_MGMT_VPLL))
- (pad 9 smd rect (at 1.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 10 smd rect (at 1.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 11 smd rect (at 2.25 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 12 smd rect (at 2.75 4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 134 FT_MGMT_VCC3V3))
- (pad 13 smd rect (at 4.05 2.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 242 "/MGMT USB UART/FT_MGMT_TXD1"))
- (pad 14 smd rect (at 4.05 2.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 241 "/MGMT USB UART/FT_MGMT_RXD1"))
- (pad 15 smd rect (at 4.05 1.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 131 FT_MGMT_RTS))
- (pad 16 smd rect (at 4.05 1.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 129 FT_MGMT_CTS))
- (pad 17 smd rect (at 4.05 0.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 130 FT_MGMT_DTR))
- (pad 18 smd rect (at 4.05 0.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 332 "Net-(U9-Pad18)"))
- (pad 19 smd rect (at 4.05 -0.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 333 "Net-(U9-Pad19)"))
- (pad 20 smd rect (at 4.05 -0.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 334 "Net-(U9-Pad20)"))
- (pad 21 smd rect (at 4.05 -1.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 335 "Net-(U9-Pad21)"))
- (pad 22 smd rect (at 4.05 -1.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 23 smd rect (at 4.05 -2.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 24 smd rect (at 4.05 -2.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 134 FT_MGMT_VCC3V3))
- (pad 25 smd rect (at 2.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 336 "Net-(U9-Pad25)"))
- (pad 26 smd rect (at 2.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 337 "Net-(U9-Pad26)"))
- (pad 27 smd rect (at 1.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 338 "Net-(U9-Pad27)"))
- (pad 28 smd rect (at 1.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 339 "Net-(U9-Pad28)"))
- (pad 29 smd rect (at 0.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 340 "Net-(U9-Pad29)"))
- (pad 30 smd rect (at 0.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 341 "Net-(U9-Pad30)"))
- (pad 31 smd rect (at -0.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 342 "Net-(U9-Pad31)"))
- (pad 32 smd rect (at -0.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 343 "Net-(U9-Pad32)"))
- (pad 33 smd rect (at -1.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 344 "Net-(U9-Pad33)"))
- (pad 34 smd rect (at -1.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 252 "/MGMT USB UART/FT_RESET1"))
- (pad 35 smd rect (at -2.25 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 36 smd rect (at -2.75 -4.05 180) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 37 smd rect (at -4.05 -2.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 220 "/MGMT USB UART/FT_VCCA1"))
- (pad 38 smd rect (at -4.05 -2.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 219 "/MGMT USB UART/FT_VCCORE1"))
- (pad 39 smd rect (at -4.05 -1.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 134 FT_MGMT_VCC3V3))
- (pad 40 smd rect (at -4.05 -1.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 137 FT_MGMT_VREGIN))
- (pad 41 smd rect (at -4.05 -0.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 573 "/Master Key Memory/MKM_VCC_PLL"))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 42 smd rect (at -4.05 -0.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 72.5 -86.5 180)
+ (path /57D84708/580240BA)
+ (attr smd)
+ (fp_text reference C7 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 202 PWR_18V))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 43 smd rect (at -4.05 0.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 345 "Net-(U9-Pad43)"))
- (pad 44 smd rect (at -4.05 0.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 346 "Net-(U9-Pad44)"))
- (pad 45 smd rect (at -4.05 1.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 347 "Net-(U9-Pad45)"))
- (pad 46 smd rect (at -4.05 1.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
- (net 134 FT_MGMT_VCC3V3))
- (pad 47 smd rect (at -4.05 2.25 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 76.25 -87.75 270)
+ (path /57D84708/580240B9)
+ (attr smd)
+ (fp_text reference C13 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 2 15V_STABLE))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 48 smd rect (at -4.05 2.75 90) (size 0.3 1.8) (layers F.Cu F.Paste F.Mask)
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0805 (layer B.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 29.718 -26.5684 270)
+ (path /57D849FD/5802406E)
+ (attr smd)
+ (fp_text reference C26 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.651 -0.762) (end -1.651 0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end -1.651 -0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end 1.651 -0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.651 0.762) (end 1.651 0.762) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (model wrlshp/SW3dPS-LQFP48.wrl
- (at (xyz 0 -0 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 0))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/6B6B27F8-B7AC.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:USB-MINIB (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 65 14.9)
- (path /57D84CB3/58023FF3)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer B.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 45.6946 -51.3334 180)
+ (path /57D849FD/58024063)
(attr smd)
- (fp_text reference CN1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C27 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 690-005-299-043 (at 0 0) (layer Cmts.User)
+ (fp_text value 10uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad "" np_thru_hole circle (at -2.2 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
- (pad "" np_thru_hole circle (at 2.2098 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
- (pad GND smd rect (at -4.34 -3.5052) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.651 -0.762) (end -1.651 0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end -1.651 -0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end 1.651 -0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.651 0.762) (end 1.651 0.762) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad VBUS smd rect (at -1.6 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0805 (layer B.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 19.77586 -5.96143)
+ (path /57D84CB3/58023FE6)
+ (attr smd)
+ (fp_text reference C72 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.651 -0.762) (end -1.651 0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end -1.651 -0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end 1.651 -0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.651 0.762) (end 1.651 0.762) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 144 FT_VREGIN))
- (pad D- smd rect (at -0.8 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 221 "/User USB UART/D1_N"))
- (pad D+ smd rect (at 0 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 222 "/User USB UART/D1_P"))
- (pad ID smd rect (at 0.8 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 266 "Net-(CN1-PadID)"))
- (pad GND smd rect (at 1.6002 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad GND smd rect (at -4.34 2) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad GND smd rect (at 4.36 -3.5052) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad GND smd rect (at 4.36 2) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (pad 2 smd rect (at 1 0) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (model wrlshp/c-1734035-2-e-3d.wrl
- (offset (xyz 0.02539999961853028 -5.009133924770355 2.000001049962997))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 360))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/23D50C2B-5C98.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:USB-MINIB (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 85 14.9)
- (path /57D84E30/58023FBD)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 25.8074 -9.89 270)
+ (path /57D84CB3/58023FFC)
(attr smd)
- (fp_text reference CN2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C77 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 690-005-299-043 (at 0 0) (layer Cmts.User)
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad "" np_thru_hole circle (at -2.2 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
- (pad "" np_thru_hole circle (at 2.2098 -1.016) (size 1.016 1.016) (drill 1.1) (layers *.Cu *.Paste *.Mask))
- (pad GND smd rect (at -4.34 -3.5052) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad VBUS smd rect (at -1.6 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 137 FT_MGMT_VREGIN))
- (pad D- smd rect (at -0.8 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 223 "/MGMT USB UART/DM_N"))
- (pad D+ smd rect (at 0 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 224 "/MGMT USB UART/DM_P"))
- (pad ID smd rect (at 0.8 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 267 "Net-(CN2-PadID)"))
- (pad GND smd rect (at 1.6002 -3.7 180) (size 0.6 1.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad GND smd rect (at -4.34 2) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad GND smd rect (at 4.36 -3.5052) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad GND smd rect (at 4.36 2) (size 1.6 2) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 142 FT_VPHY))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (model wrlshp/c-1734035-2-e-3d.wrl
- (offset (xyz 0.02539999961853028 -5.009133924770355 2.000001049962997))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 360))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/23D50C2B-5C98.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:PLS-3 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 88.67933 1.5)
- (path /57D84FAD/58023F9B)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 24.2072 -15.8844 90)
+ (path /57D84CB3/58023FFA)
(attr smd)
- (fp_text reference JP4 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C80 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLS-3 (at 0 0) (layer Cmts.User)
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 3 thru_hole circle (at 2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 143 FT_VPLL))
+ (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 2 thru_hole circle (at 0 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 1 3V3_BATT))
- (pad 1 thru_hole rect (at -2.54 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (model wrlshp/pin_header_aw_108_03-t.wrl
- (offset (xyz 0.05003799924850464 0.05003799924850464 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 90 360 0))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/836C6F64-A2E5.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:PLS-2 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 64.6468 -91.7448)
- (path /57D84708/580240BB)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 7.7734 -15.0716 90)
+ (path /57D84CB3/58023FFF)
(attr smd)
- (fp_text reference JP2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C82 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLS-2 (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 169 "Net-(JP2-Pad2)"))
- (pad 1 thru_hole rect (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 243 /Power/15V_LDO_ENABLE))
- (model "wrlshp/User Library-Header1x2.wrl"
- (offset (xyz 5.675121914768218 11.80693582267761 -6.799998997874261))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 141 FT_VCC3V3))
+ (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/3416A7AC-A52A.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:PLD-16 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 59.58299 -97.7646)
- (path /57D854CB/58023EF9)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer B.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 78.40381 -17.07095 90)
+ (path /57D84E30/58023FB0)
(attr smd)
- (fp_text reference SV2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C87 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLD-16 (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 thru_hole rect (at 8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 2 thru_hole circle (at 8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 3 thru_hole circle (at 6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 4 thru_hole circle (at 6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 5 thru_hole circle (at 3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 3 GND))
- (pad 6 thru_hole circle (at 3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 3 GND))
- (pad 7 thru_hole circle (at 1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 99 FPGA_GPIO_A_0))
- (pad 8 thru_hole circle (at 1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 100 FPGA_GPIO_A_1))
- (pad 9 thru_hole circle (at -1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 101 FPGA_GPIO_A_2))
- (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 102 FPGA_GPIO_A_3))
- (pad 11 thru_hole circle (at -3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 3 GND))
- (pad 12 thru_hole circle (at -3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)) (justify mirror))
+ )
+ (fp_line (start -1.651 -0.762) (end -1.651 0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end -1.651 -0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end 1.651 -0.762) (layer B.Fab) (width 0.1))
+ (fp_line (start -1.651 0.762) (end 1.651 0.762) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
+ (net 137 FT_MGMT_VREGIN))
+ (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 13 thru_hole circle (at -6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 103 FPGA_GPIO_A_4))
- (pad 14 thru_hole circle (at -6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 104 FPGA_GPIO_A_5))
- (pad 15 thru_hole circle (at -8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 105 FPGA_GPIO_A_6))
- (pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 106 FPGA_GPIO_A_7))
- (model wrlshp/pin_header_awl254-dg-g16d.wrl
- (offset (xyz -0.006349999904632569 -0.03632199945449829 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 90 360 180))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/B280C847-2543.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:PLD-16 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 36.79919 -97.7646)
- (path /57D854CB/58023EF4)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 86.419 -7.0668 270)
+ (path /57D84E30/58023FC6)
(attr smd)
- (fp_text reference SV3 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C92 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLD-16 (at 0 0) (layer Cmts.User)
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 thru_hole rect (at 8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 2 thru_hole circle (at 8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 3 thru_hole circle (at 6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 4 thru_hole circle (at 6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 5 thru_hole circle (at 3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 3 GND))
- (pad 6 thru_hole circle (at 3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 3 GND))
- (pad 7 thru_hole circle (at 1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 107 FPGA_GPIO_B_0))
- (pad 8 thru_hole circle (at 1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 108 FPGA_GPIO_B_1))
- (pad 9 thru_hole circle (at -1.27 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 109 FPGA_GPIO_B_2))
- (pad 10 thru_hole circle (at -1.27 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 110 FPGA_GPIO_B_3))
- (pad 11 thru_hole circle (at -3.81 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 3 GND))
- (pad 12 thru_hole circle (at -3.81 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 135 FT_MGMT_VPHY))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 13 thru_hole circle (at -6.35 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 111 FPGA_GPIO_B_4))
- (pad 14 thru_hole circle (at -6.35 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 112 FPGA_GPIO_B_5))
- (pad 15 thru_hole circle (at -8.89 -1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 113 FPGA_GPIO_B_6))
- (pad 16 thru_hole circle (at -8.89 1.27 180) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 114 FPGA_GPIO_B_7))
- (model wrlshp/pin_header_awl254-dg-g16d.wrl
- (offset (xyz -0.006349999904632569 -0.03632199945449829 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 90 360 180))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/B280C847-2543.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:PLD-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 41.04639 -12.5222 90)
- (path /57D84CB3/58023FEF)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 91.186 -7.207 270)
+ (path /57D84E30/58023FC4)
(attr smd)
- (fp_text reference J2 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference C95 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLD-6 (at 0 0 90) (layer Cmts.User)
+ (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 thru_hole rect (at -1.27 -2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 136 FT_MGMT_VPLL))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 2 thru_hole circle (at 1.27 -2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 144 FT_VREGIN))
- (pad 3 thru_hole circle (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 234 "/User USB UART/USB_P"))
- (pad 4 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 233 "/User USB UART/USB_N"))
- (pad 5 thru_hole circle (at -1.27 2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 239 "/User USB UART/FT_RXD1"))
- (pad 6 thru_hole circle (at 1.27 2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 240 "/User USB UART/FT_TXD1"))
- (model wrlshp/pin_header_awl254-dg-g06d.wrl
- (offset (xyz 0 -0.009905999851226806 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 90 360 90))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/B3089A96-FA19.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:PLD-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 74.90459 -12.5222 90)
- (path /57D84E30/58023FB9)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 90 -25 180)
+ (path /57D84E30/58023FC9)
(attr smd)
- (fp_text reference J3 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference C97 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLD-6 (at 0 0 90) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 thru_hole rect (at -1.27 -2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 134 FT_MGMT_VCC3V3))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 2 thru_hole circle (at 1.27 -2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 137 FT_MGMT_VREGIN))
- (pad 3 thru_hole circle (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 236 "/MGMT USB UART/USB_MGMT_P"))
- (pad 4 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 235 "/MGMT USB UART/USB_MGMT_N"))
- (pad 5 thru_hole circle (at -1.27 2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 241 "/MGMT USB UART/FT_MGMT_RXD1"))
- (pad 6 thru_hole circle (at 1.27 2.54) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 242 "/MGMT USB UART/FT_MGMT_TXD1"))
- (model wrlshp/pin_header_awl254-dg-g06d.wrl
- (offset (xyz 0 -0.009905999851226806 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 90 360 90))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/B3089A96-FA19.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:PLD-6 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 18.25 -29.475)
- (path /57D85260/58023F3C)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 52.07 -83.0072)
+ (path /57D855DE/58023E94)
(attr smd)
- (fp_text reference JP7 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C132 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLD-6 (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 thru_hole rect (at -1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 91 FPGA_CFG_CTRL_ARM_ENA))
- (pad 2 thru_hole circle (at 1.27 -2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 231 "/Config memory/SPI_A_TRISTATE"))
- (pad 3 thru_hole circle (at -1.27 0 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 92 FPGA_CFG_CTRL_FPGA_DIS))
- (pad 4 thru_hole circle (at 1.27 0 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 227 "/Config memory/SPI_B_TRISTATE"))
- (pad 5 thru_hole circle (at -1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 232 "/Config memory/FPGA_PROM_W_N"))
- (pad 6 thru_hole circle (at 1.27 2.54 270) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (model wrlshp/pin_header_awl254-dg-g06d.wrl
- (offset (xyz 0 -0.009905999851226806 0))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 125 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 90 360 90))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/B3089A96-FA19.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:PLS-8 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 40.3 -1.3)
- (path /57D85134/58023F68)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 43.9928 -71.6788 270)
+ (path /57D855DE/58023E93)
(attr smd)
- (fp_text reference SV1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C136 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value PLS-8 (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 8 thru_hole circle (at 8.89 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 3 GND))
- (pad 1 thru_hole rect (at -8.89 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 210 VCCO_3V3))
- (pad 2 thru_hole circle (at -6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 258 "/Config interface/FPGA_JTAG_TCK"))
- (pad 3 thru_hole circle (at -3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 257 "/Config interface/FPGA_JTAG_TMS"))
- (pad 4 thru_hole circle (at -1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 256 "/Config interface/FPGA_JTAG_TDI"))
- (pad 5 thru_hole circle (at 1.27 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 265 "/Config interface/FPGA_JTAG_TDO"))
- (pad 6 thru_hole circle (at 3.81 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
- (net 3 GND))
- (pad 7 thru_hole circle (at 6.35 0) (size 1.5 1.5) (drill 1) (layers *.Cu *.Paste *.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 125 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (model wrlshp/PLS-8.wrl
- (offset (xyz 8.889999866485596 -0 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 0))
)
- (model wrlshp/A962434E-CFE5.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 45.5142 16)
- (path /57D84936/5802407B)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 52.07 -85.725)
+ (path /57D855DE/58023E92)
(attr smd)
- (fp_text reference LED1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C139 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 125 FPGA_VCCAUX_1V8))
+ (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 170 "Net-(LED1-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 41.51419 16)
- (path /57D84936/58024079)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 61.849 -81.5594)
+ (path /57D855DE/58023EB1)
(attr smd)
- (fp_text reference LED2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C140 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KRKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 171 "Net-(LED2-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 39.51419 16)
- (path /57D84936/5802407C)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 60.1218 -55.118 270)
+ (path /57D855DE/58023E9A)
(attr smd)
- (fp_text reference LED3 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C141 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191TBKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 172 "Net-(LED3-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 43.5142 16)
- (path /57D84936/5802407A)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 71.6788 -71.0184 90)
+ (path /57D855DE/58023EA0)
(attr smd)
- (fp_text reference LED4 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C144 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KSKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 173 "Net-(LED4-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 34.35 16)
- (path /57D84FAD/58023F8E)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 43.9166 -67.1068 270)
+ (path /57D855DE/58023E99)
(attr smd)
- (fp_text reference LED9 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C145 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 174 "Net-(LED9-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 30.35 16)
- (path /57D84FAD/58023F9E)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 41.4274 -67.1068 270)
+ (path /57D855DE/58023E9F)
(attr smd)
- (fp_text reference LED10 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C148 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KRKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 175 "Net-(LED10-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 28.35 16)
- (path /57D84FAD/58023F8F)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 69.2658 -70.9676 90)
+ (path /57D855DE/58023E98)
(attr smd)
- (fp_text reference LED11 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C149 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191TBKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 176 "Net-(LED11-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 32.35 16)
- (path /57D84FAD/58023F8D)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 57.3024 -84.0232 180)
+ (path /57D855DE/58023E9E)
(attr smd)
- (fp_text reference LED12 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C152 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KSKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 177 "Net-(LED12-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 74 16)
- (path /57D85134/58023F59)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 70.485 -66.6496 270)
+ (path /57D855DE/58023E97)
(attr smd)
- (fp_text reference LED13 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C153 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KRKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 244 "/Config interface/FPGA_DONE_INT"))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 178 "Net-(LED13-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 52.05 16)
- (path /57D854CB/58023EEE)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 56.7436 -53.7972 180)
+ (path /57D855DE/58023E9D)
(attr smd)
- (fp_text reference LED14 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C156 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KRKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 179 "Net-(LED14-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 56.05 16)
- (path /57D854CB/58023EF0)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 57.3024 -81.5594 180)
+ (path /57D855DE/58023E96)
(attr smd)
- (fp_text reference LED15 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C157 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 180 "Net-(LED15-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 54.05 16)
- (path /57D854CB/58023EEF)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 41.402 -71.6788 90)
+ (path /57D855DE/58023E9C)
(attr smd)
- (fp_text reference LED16 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C160 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KSKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 181 "Net-(LED16-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 50.05 16)
- (path /57D854CB/58023EF1)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 56.769 -56.1848 180)
+ (path /57D855DE/58023E95)
(attr smd)
- (fp_text reference LED17 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C161 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191TBKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 126 FPGA_VCCINT_1V0))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 182 "Net-(LED17-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:VD_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 76.13225 16)
- (path /57D85B19/58023E15)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 63.246 -54.74298 270)
+ (path /57D8583B/58023E4D)
(attr smd)
- (fp_text reference LED18 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C169 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value LTST-C191KGKT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 184 "Net-(LED18-Pad2)"))
- (pad 1 smd rect (at 0 -0.8) (size 1 0.8) (layers F.Cu F.Paste F.Mask)
- (net 183 "Net-(LED18-Pad1)"))
- (model wrlshp/A9F03225-78F3.wrl
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:QFN68 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 25.9842 -57.4802)
- (path /57D85A75/58023E29)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 42.7736 -82.0674 180)
+ (path /57D8583B/58023E4A)
(attr smd)
- (fp_text reference U16 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C170 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value EN5364QI (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd oval (at 5.5 -3.5052 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 2 smd oval (at 5.5 -3.0226 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 3 smd oval (at 5.5 -2.5146 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 4 smd oval (at 5.5 -2.0066 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 5 smd oval (at 5.5 -1.524 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 6 smd oval (at 5.5 -1.016 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 7 smd oval (at 5.5 -0.508 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 8 smd oval (at 5.5 0 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 9 smd oval (at 5.5 0.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 10 smd oval (at 5.5 1 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 11 smd oval (at 5.5 1.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 12 smd oval (at 5.5 2 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 13 smd oval (at 5.5 2.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (pad 14 smd oval (at 5.5 3 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 15 smd oval (at 5.5 3.5 180) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 16 smd oval (at 4.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 17 smd oval (at 4 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 18 smd oval (at 3.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 19 smd oval (at 3 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 20 smd oval (at 2.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 21 smd oval (at 2 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 22 smd oval (at 1.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 23 smd oval (at 1 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 24 smd oval (at 0.5 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 25 smd oval (at 0 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 26 smd oval (at -0.508 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 27 smd oval (at -1.016 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 28 smd oval (at -1.524 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 29 smd oval (at -2.0066 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 30 smd oval (at -2.5146 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 31 smd oval (at -3.0226 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 32 smd oval (at -3.5052 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 33 smd oval (at -4.0132 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 34 smd oval (at -4.5212 3.9 90) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 35 smd oval (at -5.5118 3.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 36 smd oval (at -5.5118 3) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 37 smd oval (at -5.5118 2.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 38 smd oval (at -5.5118 2) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 39 smd oval (at -5.5118 1.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 40 smd oval (at -5.5118 1) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 41 smd oval (at -5.5118 0.5) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 42 smd oval (at -5.5118 0) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 43 smd oval (at -5.5118 -0.508) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 44 smd oval (at -5.5118 -1.016) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 45 smd oval (at -5.5118 -1.524) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 46 smd oval (at -5.5118 -2.0066) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 47 smd oval (at -5.5118 -2.5146) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask))
- (pad 48 smd oval (at -5.5118 -3.0226) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 562 "Net-(U16-Pad48)"))
- (pad 49 smd oval (at -5.5118 -3.5052) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 563 "Net-(U16-Pad49)"))
- (pad 50 smd oval (at -4.5212 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 564 "Net-(U16-Pad50)"))
- (pad 51 smd oval (at -4.0132 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 197 "Net-(R66-Pad1)"))
- (pad 52 smd oval (at -3.5052 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 204 PWR_ENA_VCCINT))
- (pad 53 smd oval (at -3.0226 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (pad 54 smd oval (at -2.5146 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 200 POK_VCCINT))
- (pad 55 smd oval (at -2.0066 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 56 smd oval (at -1.524 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 167 "Net-(C208-Pad2)"))
- (pad 57 smd oval (at -1.016 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 565 "Net-(U16-Pad57)"))
- (pad 58 smd oval (at -0.508 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 566 "Net-(U16-Pad58)"))
- (pad 59 smd oval (at 0 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 165 "Net-(C207-Pad1)"))
- (pad 60 smd oval (at 0.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 567 "Net-(U16-Pad60)"))
- (pad 61 smd oval (at 1 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 568 "Net-(U16-Pad61)"))
- (pad 62 smd oval (at 1.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 569 "Net-(U16-Pad62)"))
- (pad 63 smd oval (at 2 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 198 "Net-(R67-Pad1)"))
- (pad 64 smd oval (at 2.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 65 smd oval (at 3 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 66 smd oval (at 3.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 67 smd oval (at 4 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 68 smd oval (at 4.5 -3.9116 270) (size 0.6096 0.254) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad PAD69 smd oval (at -2.175 0.625 90) (size 5.35 2.35) (layers B.Cu B.Paste B.Mask)
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 42.8244 -79.2734 180)
+ (path /57D8583B/58023E49)
+ (attr smd)
+ (fp_text reference C171 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad PAD70 smd oval (at 3.55 -2.65 180) (size 2.5 1.3) (layers B.Cu B.Paste B.Mask)
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 40.1574 -63.0428 270)
+ (path /57D8583B/58023E45)
+ (attr smd)
+ (fp_text reference C172 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
)
- (module Cryptech_Alpha_Footprints:XTAL3215 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 19.275 -45.6)
- (path /57D84C55/5802401E)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 42.5958 -63.0428 270)
+ (path /57D8583B/58023E44)
(attr smd)
- (fp_text reference X1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C173 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value ABS07-32.768KHZ-T (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad P$1 smd rect (at 0 -1.2192 90) (size 1.1176 1.905) (layers F.Cu F.Paste F.Mask)
- (net 153 "Net-(C70-Pad2)"))
- (pad P$2 smd rect (at 0 1.2 270) (size 1.1176 1.905) (layers F.Cu F.Paste F.Mask)
- (net 154 "Net-(C71-Pad2)"))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
)
- (module Cryptech_Alpha_Footprints:RCLAMP0502A (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 51.816 -11.0744)
- (path /57D84CB3/58023FF2)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 52.2986 -54.9148 180)
+ (path /57D8583B/58023E41)
(attr smd)
- (fp_text reference IC5 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C174 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value RCLAMP0502A.TCT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 6 smd rect (at 0.5 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 222 "/User USB UART/D1_P"))
- (pad 5 smd rect (at 0 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 144 FT_VREGIN))
- (pad 4 smd rect (at -0.5 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 221 "/User USB UART/D1_N"))
- (pad 3 smd rect (at -0.5 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 233 "/User USB UART/USB_N"))
- (pad 2 smd rect (at 0 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0.5 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 234 "/User USB UART/USB_P"))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
)
- (module Cryptech_Alpha_Footprints:RCLAMP0502A (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 69.1134 -11.0744)
- (path /57D84E30/58023FBC)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 69.2658 -78.9432 90)
+ (path /57D8583B/58023E4C)
(attr smd)
- (fp_text reference IC6 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C175 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value RCLAMP0502A.TCT (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 6 smd rect (at 0.5 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 224 "/MGMT USB UART/DM_P"))
- (pad 5 smd rect (at 0 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 137 FT_MGMT_VREGIN))
- (pad 4 smd rect (at -0.5 0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 223 "/MGMT USB UART/DM_N"))
- (pad 3 smd rect (at -0.5 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 235 "/MGMT USB UART/USB_MGMT_N"))
- (pad 2 smd rect (at 0 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0.5 -0.725 270) (size 0.85 0.3) (layers F.Cu F.Paste F.Mask)
- (net 236 "/MGMT USB UART/USB_MGMT_P"))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/68E8DA21-73BF.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
)
- (module Cryptech_Alpha_Footprints:L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 41.4528 -84.2772 270)
- (path /57D853B0/58023F06)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 65.4558 -55.118 270)
+ (path /57D8583B/58023E4B)
(attr smd)
- (fp_text reference FB5 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference C176 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BLM31PG330SN1 (at 0 0 90) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.4 270) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
- (net 125 FPGA_VCCAUX_1V8))
- (pad 1 smd rect (at 0 1.4 270) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
- (net 161 "Net-(C117-Pad1)"))
- (model "wrlshp/User Library-V1206HD.wrl"
- (offset (xyz 0.05003799924850464 0 0))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 270))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/76148CD0-6DD3.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 7.7978 -33.147 270)
- (path /57D853B0/58023F14)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 66.1162 -81.5594)
+ (path /57D8583B/58023E47)
(attr smd)
- (fp_text reference FB6 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference C177 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BLM31PG330SN1 (at 0 0 90) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.4 270) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
- (pad 1 smd rect (at 0 1.4 270) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
- (net 163 "Net-(C118-Pad1)"))
- (model "wrlshp/User Library-V1206HD.wrl"
- (offset (xyz 0.05003799924850464 0 0))
+ (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 270))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/76148CD0-6DD3.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:L_1206 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 39.624 -58.2168)
- (path /57D85A75/58023E22)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 42.6212 -75.9206 90)
+ (path /57D8583B/58023E46)
(attr smd)
- (fp_text reference FB7 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C178 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BLM31PG330SN1 (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.4) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 1 smd rect (at 0 1.4) (size 1.8 1.4) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (model "wrlshp/User Library-V1206HD.wrl"
- (offset (xyz 0.05003799924850464 0 0))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 270))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/76148CD0-6DD3.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:C_D (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 10.4648 -54.5846)
- (path /57D84708/580240B3)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 69.2658 -74.8284 270)
+ (path /57D8583B/58023E43)
(attr smd)
- (fp_text reference C9 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C179 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 330uF (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (model wrlshp/SW3dPS-cap_d.wrl
- (offset (xyz -0.05003799924850464 -0 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/5917D381-109F.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:C_D (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 10.4648 -61.0616)
- (path /57D84708/580240B2)
+ (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 60BDC58A) (tstamp 539EEDBF)
+ (at 47.4472 -56.0832)
+ (path /57D8583B/58023E42)
(attr smd)
- (fp_text reference C10 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C180 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 330uF (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.8 0.8) (thickness 0.1)))
+ )
+ (fp_line (start -1.651 0.762) (end -1.651 -0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 0.762) (end -1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.651 -0.762) (end 1.651 0.762) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.651 -0.762) (end 1.651 -0.762) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (model wrlshp/SW3dPS-cap_d.wrl
- (offset (xyz -0.05003799924850464 -0 0))
+ (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
+ (offset (xyz 0 -0.02489199962615967 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/5917D381-109F.wrl
+ (model wrlshp/68E8DA21-73BF.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:C_D (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 79.7052 -71.501 270)
- (path /57D855DE/58023E8E)
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 5F035ED9)
+ (at 72.3 -28.2 180)
+ (path /57D8509E/5F090460)
(attr smd)
- (fp_text reference C123 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference C106 (at -1.36 -0.006 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 330uF (at 0 0 90) (layer Cmts.User)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 572 "/Master Key Memory/MKM_VPP"))
+ (model "wrlshp/SW3dPS-0603 SMD Capacitor.wrl"
+ (at (xyz 0 0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/175C1D2E-5B2D.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 5F035EC9)
+ (at 72.3 -31.1 180)
+ (path /57D8509E/5F043BA5)
+ (attr smd)
+ (fp_text reference C104 (at -1.36 1.158 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at -3.25 0 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 3.25 0 90) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (model wrlshp/SW3dPS-cap_d.wrl
- (offset (xyz -0.05003799924850464 -0 0))
+ (pad 1 smd rect (at 0 0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (model "wrlshp/SW3dPS-0603 SMD Capacitor.wrl"
+ (at (xyz 0 0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (rotate (xyz 270 360 90))
)
- (model wrlshp/5917D381-109F.wrl
+ (model wrlshp/175C1D2E-5B2D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 180))
)
)
- (module Cryptech_Alpha_Footprints:C_D (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 54.8754 -90.997)
- (path /57D855DE/58023E8D)
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 5F035EC3)
+ (at 69.9 -28.2 180)
+ (path /57D8509E/5F09046A)
(attr smd)
- (fp_text reference C127 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C103 (at 1.32 0.248 270) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 330uF (at 0 0) (layer Cmts.User)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (pad 1 smd rect (at 0 0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 1 3V3_BATT))
+ (model "wrlshp/SW3dPS-0603 SMD Capacitor.wrl"
+ (at (xyz 0 0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 90))
+ )
+ (model wrlshp/175C1D2E-5B2D.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 180))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 5F035EBD)
+ (at 69.9 -31.3 180)
+ (path /57D8509E/5F043CFB)
+ (attr smd)
+ (fp_text reference C102 (at 1.32 0.958 270) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at -3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 270) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
+ (pad 2 smd rect (at 0 -0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 3.25 0 180) (size 2.4 2.6) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (model wrlshp/SW3dPS-cap_d.wrl
- (offset (xyz -0.05003799924850464 -0 0))
+ (pad 1 smd rect (at 0 0.7 270) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
+ (net 1 3V3_BATT))
+ (model "wrlshp/SW3dPS-0603 SMD Capacitor.wrl"
+ (at (xyz 0 0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (rotate (xyz 270 360 90))
)
- (model wrlshp/5917D381-109F.wrl
+ (model wrlshp/175C1D2E-5B2D.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (rotate (xyz 0 0 180))
)
)
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 539EEDBF)
(at 47.7266 -14.2494 270)
(path /57D849FD/58024060)
(attr smd)
@@ -7010,6 +8252,13 @@
(fp_text value 1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
(pad 2 smd rect (at 0 -0.7) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
(pad 1 smd rect (at 0 0.7) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
@@ -7026,7 +8275,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 539EEDBF)
(at 55.0672 -51.5112 90)
(path /57D849FD/5802405E)
(attr smd)
@@ -7036,6 +8285,13 @@
(fp_text value 2.2uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
(pad 2 smd rect (at 0 -0.7 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
(net 215 "/STM32 power/VCAP1"))
(pad 1 smd rect (at 0 0.7 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
@@ -7052,7 +8308,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 539EEDBF)
(at 55.0672 -49.6824 90)
(path /57D849FD/5802405D)
(attr smd)
@@ -7062,6 +8318,13 @@
(fp_text value 2.2uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 180) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
(pad 2 smd rect (at 0 -0.7 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
(net 215 "/STM32 power/VCAP1"))
(pad 1 smd rect (at 0 0.7 180) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
@@ -7078,7 +8341,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 539EEDBF)
(at 65.9638 -24.384)
(path /57D849FD/5802405F)
(attr smd)
@@ -7088,6 +8351,13 @@
(fp_text value 2.2uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 -90) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
(pad 2 smd rect (at 0 -0.7 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
(net 216 "/STM32 power/VCAP2"))
(pad 1 smd rect (at 0 0.7 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
@@ -7104,7 +8374,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0603 (layer B.Cu) (tedit 60BDC44F) (tstamp 539EEDBF)
(at 67.7926 -24.384)
(path /57D849FD/5802405C)
(attr smd)
@@ -7114,6 +8384,13 @@
(fp_text value 2.2uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 -90) (layer B.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.05)) (justify mirror))
+ )
+ (fp_line (start -0.508 1.143) (end 0.508 1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 1.143) (end 0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.508 -1.143) (end -0.508 -1.143) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.508 -1.143) (end -0.508 1.143) (layer B.Fab) (width 0.1))
(pad 2 smd rect (at 0 -0.7 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
(net 216 "/STM32 power/VCAP2"))
(pad 1 smd rect (at 0 0.7 90) (size 0.8 0.8) (layers B.Cu B.Paste B.Mask)
@@ -7130,941 +8407,3505 @@
)
)
- (module Cryptech_Alpha_Footprints:L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 27.3512 -15.7226)
- (path /57D84CB3/58023FF4)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 5F27F142)
+ (at 97.8 -23.2 90)
+ (path /57D8509E/5F17FA51)
(attr smd)
- (fp_text reference FB1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R48 (at 0 1.26 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value FBMH1608HL601-T (at 0 0) (layer Cmts.User)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 1 3V3_BATT))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 584 ICE40_CDONE))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 5F27F0BA)
+ (at 97.8 -25.2 270)
+ (path /57D8509E/5F1B0182)
+ (attr smd)
+ (fp_text reference R34 (at -0.962 -1.26 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 10k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
- (net 142 FT_VPHY))
- (pad 1 smd rect (at 0 -0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
- (net 141 FT_VCC3V3))
- (model "wrlshp/User Library-V0603HD.wrl"
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 585 ICE40_CRESET))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 1 3V3_BATT))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
(at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/AF13F747-700F.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 20.7528 -14.9192 90)
- (path /57D84CB3/58023FF6)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 5F27F0B4)
+ (at 97.8 -17.4 270)
+ (path /57D8509E/5F1532CF)
(attr smd)
- (fp_text reference FB2 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R33 (at 0.128 -1.26 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value FBMH1608HL601-T (at 0 0 90) (layer Cmts.User)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 582 "/Master Key Memory/ICE40_SPI_SCK"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 5F0366A7)
+ (at 85.7 -30.3 180)
+ (path /57D8509E/5F057AAC)
+ (attr smd)
+ (fp_text reference R24 (at -0.152 -1.344) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 100 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.85 90) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
- (net 143 FT_VPLL))
- (pad 1 smd rect (at 0 -0.85 90) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
- (net 141 FT_VCC3V3))
- (model "wrlshp/User Library-V0603HD.wrl"
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 573 "/Master Key Memory/MKM_VCC_PLL"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
(at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/AF13F747-700F.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 93.218 -10.9662)
- (path /57D84E30/58023FBE)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 27.5 -81.4 270)
+ (path /57D84708/580240AE)
(attr smd)
- (fp_text reference FB3 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R1 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value FBMH1608HL601-T (at 0 0) (layer Cmts.User)
+ (fp_text value 56k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
- (net 135 FT_MGMT_VPHY))
- (pad 1 smd rect (at 0 -0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
- (net 134 FT_MGMT_VCC3V3))
- (model "wrlshp/User Library-V0603HD.wrl"
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 188 "Net-(R1-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 202 PWR_18V))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
(at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/AF13F747-700F.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:L_0603 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 91.186 -10.9662)
- (path /57D84E30/58023FC0)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 27.5 -79.2 270)
+ (path /57D84708/580240AF)
(attr smd)
- (fp_text reference FB4 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R2 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value FBMH1608HL601-T (at 0 0) (layer Cmts.User)
+ (fp_text value 4.64k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
- (net 136 FT_MGMT_VPLL))
- (pad 1 smd rect (at 0 -0.85) (size 1 0.9) (layers F.Cu F.Paste F.Mask)
- (net 134 FT_MGMT_VCC3V3))
- (model "wrlshp/User Library-V0603HD.wrl"
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 188 "Net-(R1-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
(at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 360 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/AF13F747-700F.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:CRYSTAL_3.2X2.5 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 28.3 -34.975)
- (path /57D84936/58024088)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 25.7048 -80.8308)
+ (path /57D84708/580240B0)
(attr smd)
- (fp_text reference Q3 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R3 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value ABM8G-25.000MHZ-4Y-T3 (at 0 0) (layer Cmts.User)
+ (fp_text value 100 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 4 smd rect (at 1.1176 -0.8636) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 3 smd rect (at -1.0922 -0.8636) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
- (net 213 "/STM32 configuration/OSC_OUT"))
- (pad 2 smd rect (at -1.0922 0.8382 180) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 1.1176 0.8382 180) (size 1.397 1.1938) (layers B.Cu B.Paste B.Mask)
- (net 152 "Net-(C17-Pad2)"))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 188 "Net-(R1-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 189 "Net-(R3-Pad2)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
)
- (module Cryptech_Alpha_Footprints:CRYSTAL_3.2X2.5 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 23.075 -5.5 90)
- (path /57D84CB3/58023FEC)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 64.4906 -82.931 270)
+ (path /57D85260/58023F41)
(attr smd)
- (fp_text reference Y1 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R4 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value ABM8G-12.000MHZ-4Y-T3 (at 0 0 90) (layer Cmts.User)
+ (fp_text value 0 (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 4 smd rect (at 1.1176 0.8636 90) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 3 smd rect (at -1.0922 0.8636 90) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
- (net 155 "Net-(C75-Pad2)"))
- (pad 2 smd rect (at -1.0922 -0.8382 270) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 1.1176 -0.8382 270) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
- (net 156 "Net-(C78-Pad2)"))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 98 FPGA_GCLK))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 187 "Net-(Q5-Pad3)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
)
- (module Cryptech_Alpha_Footprints:CRYSTAL_3.2X2.5 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 82.525 -8.8)
- (path /57D84E30/58023FB6)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 71.75 -99.5 180)
+ (path /57D84708/580240BC)
(attr smd)
- (fp_text reference Y2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R5 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value ABM8G-12.000MHZ-4Y-T3 (at 0 0) (layer Cmts.User)
+ (fp_text value 1k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 4 smd rect (at 1.1176 0.8636) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 97 FPGA_ENTROPY_DISABLE))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 185 "Net-(Q1-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 71.75 -98.25)
+ (path /57D84708/580240BD)
+ (attr smd)
+ (fp_text reference R6 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 185 "Net-(Q1-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 3 smd rect (at -1.0922 0.8636) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
- (net 157 "Net-(C90-Pad2)"))
- (pad 2 smd rect (at -1.0922 -0.8382 180) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 71 -89.5 270)
+ (path /57D84708/580240B1)
+ (attr smd)
+ (fp_text reference R7 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 202 PWR_18V))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 243 /Power/15V_LDO_ENABLE))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 25.5778 -73.1774)
+ (path /57D84708/580240AC)
+ (attr smd)
+ (fp_text reference R8 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 6.3k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 190 "Net-(R8-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 28.194 -72.6186 270)
+ (path /57D84708/580240AB)
+ (attr smd)
+ (fp_text reference R9 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 1.21k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 1.1176 -0.8382 180) (size 1.397 1.1938) (layers F.Cu F.Paste F.Mask)
- (net 158 "Net-(C93-Pad2)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 190 "Net-(R8-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 82.8548 -89.1794 90)
- (path /57D8488D/58024095)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 87.0966 -93.2434 270)
+ (path /57D8488D/5802409A)
(attr smd)
- (fp_text reference D1 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R10 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BAT54LT1G (at 0 0 90) (layer Cmts.User)
+ (fp_text value 470 (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 1.1 180) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 212 "/Entropy source/RAW_NOISE"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 211 "/Entropy source/NOISE_IN"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 90.9828 -84.6328)
+ (path /57D8488D/58024099)
+ (attr smd)
+ (fp_text reference R11 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 1k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 2 15V_STABLE))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 212 "/Entropy source/RAW_NOISE"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 84.6582 -86.106)
+ (path /57D8488D/58024097)
+ (attr smd)
+ (fp_text reference R12 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 4 "Net-(C15-Pad2)"))
- (pad 2 smd rect (at -0.95 1.1 180) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask))
- (pad 3 smd rect (at 0 -1.1 180) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 225 "/Entropy source/AMPLIFIED"))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 20.9804 -63.5508 270)
- (path /57D85B19/58023E10)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 80.6958 -81.8896 90)
+ (path /57D8488D/58024096)
(attr smd)
- (fp_text reference D2 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R13 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BAT54LT1G (at 0 0 90) (layer Cmts.User)
+ (fp_text value 1k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 204 PWR_ENA_VCCINT))
- (pad 2 smd rect (at -0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask))
- (pad 3 smd rect (at 0 1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 209 VCC_5V0))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 225 "/Entropy source/AMPLIFIED"))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 11.6078 -47.2694 270)
- (path /57D85B19/58023E0A)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 31.9278 -34.671 90)
+ (path /57D84936/5802407D)
(attr smd)
- (fp_text reference D3 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R14 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BAT54LT1G (at 0 0 90) (layer Cmts.User)
+ (fp_text value 0 (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 205 PWR_ENA_VCCO))
- (pad 2 smd rect (at -0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask))
- (pad 3 smd rect (at 0 1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 199 POK_VCCAUX))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 247 "/STM32 configuration/OSC_IN"))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 152 "Net-(C17-Pad2)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 32.8168 -72.9234 90)
- (path /57D85B19/58023E0D)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 40.9702 -20.0406 180)
+ (path /57D84936/5802407F)
(attr smd)
- (fp_text reference D4 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R15 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BAT54LT1G (at 0 0 90) (layer Cmts.User)
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 -1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 203 PWR_ENA_VCCAUX))
- (pad 2 smd rect (at -0.95 -1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask))
- (pad 3 smd rect (at 0 1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 200 POK_VCCINT))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 248 "/STM32 configuration/BOOT0"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 72.452 -95.2388)
- (path /57D84708/580240BE)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 45 -7.5 270)
+ (path /57D84936/58024082)
(attr smd)
- (fp_text reference Q1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R16 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 2N7002 (at 0 0) (layer Cmts.User)
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 -1.1 270) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 185 "Net-(Q1-Pad1)"))
- (pad 2 smd rect (at -0.95 -1.1 270) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 173 "Net-(LED4-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 11 ARM_LED3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 27.4402 -50.393 180)
+ (path /57D84C13/58024028)
+ (attr smd)
+ (fp_text reference R17 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 168 "Net-(IC1-Pad3)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 27.425 -52.9 180)
+ (path /57D84C13/5802402A)
+ (attr smd)
+ (fp_text reference R18 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 145 KSM_PROM_CS_N))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 31.3086 -41.629)
+ (path /57D84C55/5802401B)
+ (attr smd)
+ (fp_text reference R19 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 208 RTC_SDA))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 30.6832 -42.799)
+ (path /57D84C55/5802401C)
+ (attr smd)
+ (fp_text reference R20 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 207 RTC_SCL))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 30.6832 -44.0944)
+ (path /57D84C55/5802401D)
+ (attr smd)
+ (fp_text reference R21 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 206 RTC_MFP))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 20.2956 -9.1534 180)
+ (path /57D84CB3/58023FE9)
+ (attr smd)
+ (fp_text reference R22 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 12k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 249 "/User USB UART/FT_REF"))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 3 smd rect (at 0 1.1 270) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 169 "Net-(JP2-Pad2)"))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 90.3732 -92.7862 270)
- (path /57D8488D/580240A1)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 7.621 -7.3754 90)
+ (path /57D84CB3/58023FF5)
(attr smd)
- (fp_text reference Q2 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R23 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BC818-40LT1G (at 0 0 90) (layer Cmts.User)
+ (fp_text value 10k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 1.1) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
- (net 245 "/Entropy source/NOISE_OUT"))
- (pad 2 smd rect (at -0.95 1.1) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
- (net 211 "/Entropy source/NOISE_IN"))
- (pad 3 smd rect (at 0 -1.1) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
- (net 269 "Net-(Q2-Pad3)"))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 250 "/User USB UART/FT_RESET"))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 141 FT_VCC3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 89.3064 -73.0504 270)
- (path /57D85134/58023F5B)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 88.525 -9.4 180)
+ (path /57D84E30/58023FB3)
(attr smd)
- (fp_text reference Q4 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R26 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 2N7002 (at 0 0 90) (layer Cmts.User)
+ (fp_text value 12k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 119 FPGA_INIT_B))
- (pad 2 smd rect (at -0.95 -1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 251 "/MGMT USB UART/FT_REF1"))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 3 smd rect (at 0 1.1 180) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 84.1756 -24.384)
+ (path /57D84E30/58023FBF)
+ (attr smd)
+ (fp_text reference R27 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 252 "/MGMT USB UART/FT_RESET1"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 134 FT_MGMT_VCC3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 28 -7.5 270)
+ (path /57D84FAD/58023F96)
+ (attr smd)
+ (fp_text reference R31 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 177 "Net-(LED12-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 603 ICE40_LED3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 36.2204 -22.8854 90)
+ (path /57D849FD/5802405B)
+ (attr smd)
+ (fp_text reference R32 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 0 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 191 "Net-(R32-Pad2)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 79 -7.375 270)
+ (path /57D85134/58023F58)
+ (attr smd)
+ (fp_text reference R38 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 178 "Net-(LED13-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 39.25 -71.575 180)
+ (path /57D85134/58023F69)
+ (attr smd)
+ (fp_text reference R39 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 100 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 96 FPGA_DONE))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 244 "/Config interface/FPGA_DONE_INT"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 84.209 -71.7296)
+ (path /57D85134/58023F5C)
+ (attr smd)
+ (fp_text reference R40 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 246 "/Config interface/FPGA_INIT_B_INT"))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 15.7398 -42.4106 90)
- (path /57D85B19/58023E16)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 35.2 -67.65)
+ (path /57D85134/58023F5D)
(attr smd)
- (fp_text reference Q6 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R41 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 2N7002 (at 0 0 90) (layer Cmts.User)
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 -1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 201 POK_VCCO))
- (pad 2 smd rect (at -0.95 -1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 3 smd rect (at 0 1.1) (size 1.2 0.8) (layers F.Cu F.Paste F.Mask)
- (net 184 "Net-(LED18-Pad2)"))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 124 FPGA_PROGRAM_B))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 90.2208 -88.1634 180)
- (path /57D8488D/580240A0)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 92.9132 -72.1106)
+ (path /57D85134/58023F5A)
(attr smd)
- (fp_text reference T1 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R42 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BC847BLT3G (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 1.1 270) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
- (net 245 "/Entropy source/NOISE_OUT"))
- (pad 2 smd rect (at -0.95 1.1 270) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 3 smd rect (at 0 -1.1 270) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
- (net 212 "/Entropy source/RAW_NOISE"))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 119 FPGA_INIT_B))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:SOT-23 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 84.201 -82.7532)
- (path /57D8488D/5802409F)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 94.3356 -68.4022)
+ (path /57D85134/58023F66)
(attr smd)
- (fp_text reference T2 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R43 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value BC847BLT3G (at 0 0) (layer Cmts.User)
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 1 smd rect (at 0.95 1.1 90) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
- (net 4 "Net-(C15-Pad2)"))
- (pad 2 smd rect (at -0.95 1.1 90) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 3 smd rect (at 0 -1.1 90) (size 1.2 0.8) (layers B.Cu B.Paste B.Mask)
- (net 225 "/Entropy source/AMPLIFIED"))
- (model "wrlshp/SW3dPS-3-lead sot23-3.wrl"
- (offset (xyz 0 0.1259839981079102 0.3499992947435379))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 256 "/Config interface/FPGA_JTAG_TDI"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
(rotate (xyz 270 360 180))
)
- (model wrlshp/04B9CA18-3B1B.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 21.463 -99.0854 270)
- (path /57D84708/580240AD)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 94.3102 -65.8622)
+ (path /57D85134/58023F65)
(attr smd)
- (fp_text reference C1 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R44 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 202 PWR_18V))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 257 "/Config interface/FPGA_JTAG_TMS"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 21.463 -94.0689 270)
- (path /57D84708/580240C1)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 94.3102 -63.3476)
+ (path /57D85134/58023F64)
(attr smd)
- (fp_text reference C2 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R45 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 202 PWR_18V))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 258 "/Config interface/FPGA_JTAG_TCK"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 21.463 -89.0524 270)
- (path /57D84708/580240C0)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 12.9 -32.825 90)
+ (path /57D85260/58023F35)
(attr smd)
- (fp_text reference C3 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R46 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
+ (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 202 PWR_18V))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 231 "/Config memory/SPI_A_TRISTATE"))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 15.2908 -67.3354 90)
- (path /57D84708/580240BF)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 12.875 -28.55 90)
+ (path /57D85260/58023F34)
(attr smd)
- (fp_text reference C8 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R47 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0 90) (layer Cmts.User)
+ (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5 180) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 227 "/Config memory/SPI_B_TRISTATE"))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5 180) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 40.0558 -72.6186)
- (path /57D853B0/58023F19)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 68.58 -88.4428)
+ (path /57D85260/58023F38)
(attr smd)
- (fp_text reference C113 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R49 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 22uF (at 0 0) (layer Cmts.User)
+ (fp_text value 0 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 186 "Net-(Q5-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 13 -24.2 270)
+ (path /57D85260/58023F3A)
+ (attr smd)
+ (fp_text reference R50 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 232 "/Config memory/FPGA_PROM_W_N"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 42.525 -29.475)
+ (path /57D85260/58023F3B)
+ (attr smd)
+ (fp_text reference R51 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 226 "/Config memory/FPGA_PROM_CS_N"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 35.2298 -71.8058 180)
+ (path /57D853B0/58023F0A)
+ (attr smd)
+ (fp_text reference R52 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 192 "Net-(R52-Pad1)"))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 209 VCC_5V0))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 6.4008 -44.9326 180)
- (path /57D853B0/58023F05)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 30.8102 -75.8444 90)
+ (path /57D853B0/58023F0E)
(attr smd)
- (fp_text reference C114 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R53 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 22uF (at 0 0) (layer Cmts.User)
+ (fp_text value 62k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 193 "Net-(R53-Pad2)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 11.0918 -45.72)
+ (path /57D853B0/58023F18)
+ (attr smd)
+ (fp_text reference R54 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 194 "Net-(R54-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 209 VCC_5V0))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 40.0558 -79.4004 180)
- (path /57D853B0/58023F0F)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 15.5194 -41.7322 270)
+ (path /57D853B0/58023F04)
(attr smd)
- (fp_text reference C119 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R55 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text value 62k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 195 "Net-(R55-Pad2)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 30.8102 -80.391 270)
+ (path /57D853B0/58023F09)
+ (attr smd)
+ (fp_text reference R56 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 205k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 162 "Net-(C117-Pad2)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 161 "Net-(C117-Pad1)"))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 6.4008 -38.5826)
- (path /57D853B0/58023F0D)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 31.5468 -78.105 270)
+ (path /57D853B0/58023F08)
(attr smd)
- (fp_text reference C120 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R57 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text value 147k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 162 "Net-(C117-Pad2)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 15.367 -37.338 90)
+ (path /57D853B0/58023F17)
+ (attr smd)
+ (fp_text reference R58 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 205k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 164 "Net-(C118-Pad2)"))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 163 "Net-(C118-Pad1)"))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 47.9298 -84.5566 180)
- (path /57D855DE/58023E8F)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 14.732 -39.5478 90)
+ (path /57D853B0/58023F16)
(attr smd)
- (fp_text reference C126 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R59 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text value 59k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 1.5 90) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -1.5 90) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
- (net 125 FPGA_VCCAUX_1V8))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 164 "Net-(C118-Pad2)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 42.8498 -56.09135)
- (path /57D855DE/58023E9B)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 36.6 -81.475 180)
+ (path /57D853B0/58023F07)
(attr smd)
- (fp_text reference C133 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R60 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text value 470 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 161 "Net-(C117-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 74.5236 -65.8114)
- (path /57D855DE/58023E91)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 9.525 -35.8648)
+ (path /57D853B0/58023F15)
(attr smd)
- (fp_text reference C137 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R61 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text value 470 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 163 "Net-(C118-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 63.7794 -85.0646 270)
- (path /57D8583B/58023E40)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 84.209 -73.1266)
+ (path /57D85134/58023F63)
(attr smd)
- (fp_text reference C165 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R62 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0 90) (layer Cmts.User)
+ (fp_text value 0 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 1.5 180) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 1 smd rect (at 0 -1.5 180) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 246 "/Config interface/FPGA_INIT_B_INT"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 259 "/Config interface/FPGA_INIT_B_INT1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 37.225 -67.65 180)
+ (path /57D85134/58023F62)
+ (attr smd)
+ (fp_text reference R63 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 0 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 124 FPGA_PROGRAM_B))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 260 "/Config interface/FPGA_PROGRAM_B1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 81 -7 270)
+ (path /57D854CB/58023EF6)
+ (attr smd)
+ (fp_text reference R64 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 180 "Net-(LED15-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 116 FPGA_GPIO_LED_1))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 44.7 -61.35 90)
+ (path /57D8556F/58023EEB)
+ (attr smd)
+ (fp_text reference R65 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 1k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 196 "Net-(R65-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 68.834 -54.383)
- (path /57D8583B/58023E3E)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 22.0726 -62.8904 180)
+ (path /57D85A75/58023E2C)
(attr smd)
- (fp_text reference C167 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R66 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 197 "Net-(R66-Pad1)"))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 209 VCC_5V0))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 29.3116 -62.8904 180)
+ (path /57D85A75/58023E20)
+ (attr smd)
+ (fp_text reference R67 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 0 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 198 "Net-(R67-Pad1)"))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 26.924 -64.5668 180)
+ (path /57D85A75/58023E25)
+ (attr smd)
+ (fp_text reference R68 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 150k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 167 "Net-(C208-Pad2)"))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 24.4856 -64.5668 180)
+ (path /57D85A75/58023E24)
+ (attr smd)
+ (fp_text reference R69 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 226k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 167 "Net-(C208-Pad2)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 73.0758 -75.9714)
- (path /57D8583B/58023E3C)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 30.3022 -64.5668)
+ (path /57D85A75/58023E21)
(attr smd)
- (fp_text reference C168 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference R70 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text value 100 (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 166 "Net-(C208-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 37.275 -69.025 180)
+ (path /57D85134/58023F61)
+ (attr smd)
+ (fp_text reference R71 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 0 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 95 FPGA_CFG_SCLK))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 261 "/Config interface/FPGA_CFG_SCLK1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 17.78 -63.0936 90)
+ (path /57D85B19/58023E17)
+ (attr smd)
+ (fp_text reference R72 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 100k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 209 VCC_5V0))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 204 PWR_ENA_VCCINT))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 10.9982 -50.165 180)
+ (path /57D85B19/58023E0C)
+ (attr smd)
+ (fp_text reference R73 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 199 POK_VCCAUX))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 209 VCC_5V0))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 11.5 -44.7 180)
+ (path /57D85B19/58023E0B)
+ (attr smd)
+ (fp_text reference R74 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 100k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 199 POK_VCCAUX))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 205 PWR_ENA_VCCO))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 12.9712 -42.1566 90)
+ (path /57D85B19/58023E09)
+ (attr smd)
+ (fp_text reference R77 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 201 POK_VCCO))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 209 VCC_5V0))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 83.4 -4.8)
+ (path /57D85B19/58023E14)
+ (attr smd)
+ (fp_text reference R78 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 209 VCC_5V0))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 183 "Net-(LED18-Pad1)"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 76.8 -26.8)
+ (path /57D84FAD/58023F99)
+ (attr smd)
+ (fp_text reference R82 (at 0 0) (layer B.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)) (justify mirror))
+ )
+ (fp_text value 15k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 604 ICE40_PANIC))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 37.15 -66 180)
+ (path /57D8556F/58023EEA)
+ (attr smd)
+ (fp_text reference R83 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 0 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 94 FPGA_CFG_MOSI))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 262 "/MKM interface/FPGA_CFG_MOSI1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 37.15 -64.56067 180)
+ (path /57D8556F/58023EE9)
+ (attr smd)
+ (fp_text reference R84 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 0 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 93 FPGA_CFG_MISO))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 263 "/MKM interface/FPGA_CFG_MISO1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 37.15 -63.05 180)
+ (path /57D8556F/58023EE8)
+ (attr smd)
+ (fp_text reference R85 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 0 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 90 FPGA_CFG_CS_N))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 264 "/MKM interface/FPGA_CFG_CS_N1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 16.7523 -16.24 90)
+ (path /57D84CB3/58023FF1)
+ (attr smd)
+ (fp_text reference R86 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 100 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 140 FT_TXD))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 240 "/User USB UART/FT_TXD1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 15.495 -16.24 90)
+ (path /57D84CB3/58023FF0)
+ (attr smd)
+ (fp_text reference R87 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 100 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 139 FT_RXD))
+ (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 239 "/User USB UART/FT_RXD1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 92.6084 -15.1318)
+ (path /57D84E30/58023FBB)
+ (attr smd)
+ (fp_text reference R88 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 100 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 133 FT_MGMT_TXD))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 242 "/MGMT USB UART/FT_MGMT_TXD1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 92.6084 -16.605)
+ (path /57D84E30/58023FBA)
+ (attr smd)
+ (fp_text reference R89 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 100 (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 132 FT_MGMT_RXD))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 241 "/MGMT USB UART/FT_MGMT_RXD1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 92.6084 -13.6332 180)
+ (path /57D84E30/58023FB7)
+ (attr smd)
+ (fp_text reference R90 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 10k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 133 FT_MGMT_TXD))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 22.0472 -50.6476 270)
- (path /57D85A75/58023E27)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 18.0096 -16.24 270)
+ (path /57D84CB3/58023FED)
(attr smd)
- (fp_text reference C205 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R91 (at 0 0 90) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 22uF (at 0 0 90) (layer Cmts.User)
+ (fp_text value 10k (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 140 FT_TXD))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 47 -7.5 270)
+ (path /57D84936/58024083)
+ (attr smd)
+ (fp_text reference R92 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 170 "Net-(LED1-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 10 ARM_LED2))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 41 -7.5 270)
+ (path /57D84936/58024084)
+ (attr smd)
+ (fp_text reference R93 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 172 "Net-(LED3-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 9 ARM_LED1))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 43 -7.5 270)
+ (path /57D84936/58024081)
+ (attr smd)
+ (fp_text reference R94 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 171 "Net-(LED2-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 12 ARM_LED4))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 30 -7.5 270)
+ (path /57D84FAD/58023F97)
+ (attr smd)
+ (fp_text reference R95 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 174 "Net-(LED9-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 605 ICE40_LED2))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 24 -7.5 270)
+ (path /57D84FAD/58023F98)
+ (attr smd)
+ (fp_text reference R96 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 176 "Net-(LED11-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 606 ICE40_LED1))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 26 -7.5 270)
+ (path /57D84FAD/58023F95)
+ (attr smd)
+ (fp_text reference R97 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 175 "Net-(LED10-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 607 ICE40_LED4))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 79 -7 270)
+ (path /57D854CB/58023EF7)
+ (attr smd)
+ (fp_text reference R98 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 181 "Net-(LED16-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 117 FPGA_GPIO_LED_2))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 77 -7 270)
+ (path /57D854CB/58023EF8)
+ (attr smd)
+ (fp_text reference R99 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 179 "Net-(LED14-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 118 FPGA_GPIO_LED_3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 75 -7 270)
+ (path /57D854CB/58023EF5)
+ (attr smd)
+ (fp_text reference R100 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 330 (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 182 "Net-(LED17-Pad1)"))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 115 FPGA_GPIO_LED_0))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 59.4 -62.4 270)
+ (path /57D85134/58023F6A)
+ (attr smd)
+ (fp_text reference R35 (at 0 0 90) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 1k (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 253 "/Config interface/FPGA_M2"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 22.0472 -46.2788 270)
- (path /57D85A75/58023E26)
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 37.091 -59.1757 180)
+ (path /57D85134/58023F5F)
(attr smd)
- (fp_text reference C206 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference R36 (at 0 0) (layer F.SilkS) hide
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 22uF (at 0 0 90) (layer Cmts.User)
+ (fp_text value 1k (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 254 "/Config interface/FPGA_M1"))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 37.091 -60.4076)
+ (path /57D85134/58023F5E)
+ (attr smd)
+ (fp_text reference R37 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 1k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 255 "/Config interface/FPGA_M0"))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 210 VCCO_3V3))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 32.475 -75.625)
+ (path /57D85B19/58023E0E)
+ (attr smd)
+ (fp_text reference R76 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 100k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 200 POK_VCCINT))
+ (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 203 PWR_ENA_VCCAUX))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 180))
+ )
+ (model wrlshp/537E0B02-A9B3.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 0))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 60BD3D76) (tstamp 539EEDBF)
+ (at 34.417 -70.358 180)
+ (path /57D85B19/58023E0F)
+ (attr smd)
+ (fp_text reference R75 (at 0 0) (layer F.SilkS) hide
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text value 4.7k (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 200 POK_VCCINT))
+ (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 209 VCC_5V0))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 180))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/537E0B02-A9B3.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 34.6964 -55.3466 180)
- (path /57D85A75/58023E2B)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 5F27EC88)
+ (at 93.2 -33 270)
+ (path /57D8509E/5F112F44)
(attr smd)
- (fp_text reference C209 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C228 (at 0.234 2.776 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 0.1uF (at 0 0 270) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 1 3V3_BATT))
+ (pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 5F27EC82)
+ (at 94.2 -33 90)
+ (path /57D8509E/5F112F4E)
+ (attr smd)
+ (fp_text reference C227 (at -0.234 -2.506 90) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)) (justify mirror))
+ )
+ (fp_text value 0.01uF (at 0 0 270) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5 270) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (net 1 3V3_BATT))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 34.7472 -62.4078)
- (path /57D85A75/58023E2A)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F048F99)
+ (at 76.8 -29)
+ (path /57D8509E/5F14E9EA)
(attr smd)
- (fp_text reference C210 (at 0 0) (layer F.SilkS) hide
+ (fp_text reference C226 (at 0 -4.572) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0) (layer Cmts.User)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F048F93)
+ (at 76.8 -28 180)
+ (path /57D8509E/5F154973)
+ (attr smd)
+ (fp_text reference C225 (at 0 4.318) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.01uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 -1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 1.5 90) (size 1.6 2.6) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:C_1210 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 42.291 -85.6996 270)
- (path /57D8583B/58023E3F)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F048F8D)
+ (at 81 -33.2 270)
+ (path /57D8509E/5F149FB8)
(attr smd)
- (fp_text reference C166 (at 0 0 90) (layer F.SilkS) hide
+ (fp_text reference C224 (at -1.524 -2.312 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (fp_text value 47uF (at 0 0 90) (layer Cmts.User)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F048F87)
+ (at 83.2 -28 180)
+ (path /57D8509E/5F13FBA7)
+ (attr smd)
+ (fp_text reference C223 (at 2.936 -0.314) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
- (pad 2 smd rect (at 0 1.5 180) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
- (pad 1 smd rect (at 0 -1.5 180) (size 1.6 2.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (model wrlshp/SW3dPS-CAPC3225.wrl
- (offset (xyz 1.249933981227875 0 1.250000021226883))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
(scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 90))
+ (rotate (xyz 270 360 0))
)
- (model wrlshp/F26EE9BE-B6B0.wrl
+ (model wrlshp/ECAF1ED8-FCC0.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
- (rotate (xyz 0 0 180))
+ (rotate (xyz 0 0 360))
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F048F81)
+ (at 82 -33.2 90)
+ (path /57D8509E/5F15426E)
+ (attr smd)
+ (fp_text reference C222 (at 1.524 2.582 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.01uF (at 0 0 90) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F048F7B)
+ (at 83.2 -29)
+ (path /57D8509E/5F153C00)
+ (attr smd)
+ (fp_text reference C221 (at -2.936 0.044) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.01uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 1 3V3_BATT))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F045642)
+ (at 83.2 -30)
+ (path /57D8509E/5F11DC09)
+ (attr smd)
+ (fp_text reference C220 (at -2.936 -0.226) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.01uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F04563C)
+ (at 76.8 -31)
+ (path /57D8509E/5F11E1B4)
+ (attr smd)
+ (fp_text reference C219 (at 0 -5.068) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F036329)
+ (at 76.8 -30 180)
+ (path /57D8509E/5F0798C6)
+ (attr smd)
+ (fp_text reference C218 (at 0 4.826) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.01uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F036323)
+ (at 83.2 -31 180)
+ (path /57D8509E/5F077BE8)
+ (attr smd)
+ (fp_text reference C217 (at 2.936 0.496) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 5F03631D)
+ (at 86.7 -30.4)
+ (path /57D8509E/5F05C031)
+ (attr smd)
+ (fp_text reference C216 (at 1.692 0.936 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.1)))
+ )
+ (fp_text value 0.1uF (at 0 0) (layer Cmts.User)
+ (effects (font (size 1.524 1.524) (thickness 0.05)))
+ )
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
+ (pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 573 "/Master Key Memory/MKM_VCC_PLL"))
+ (pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (net 3 GND))
+ (model "wrlshp/SW3dPS-0402 SMD Capacitor.wrl"
+ (at (xyz 0 -0 0))
+ (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
+ (rotate (xyz 270 360 0))
+ )
+ (model wrlshp/ECAF1ED8-FCC0.wrl
+ (at (xyz 0 0 0))
+ (scale (xyz 1 1 1))
+ (rotate (xyz 0 0 360))
+ )
+ )
+
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 26.1 -84.7)
(path /57D84708/580240C2)
(attr smd)
@@ -8074,6 +11915,13 @@
(fp_text value 0.047uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 202 PWR_18V))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8090,7 +11938,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 25.55 -75.725)
(path /57D84708/580240B6)
(attr smd)
@@ -8100,6 +11948,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 149 "Net-(C5-Pad1)"))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8116,7 +11971,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 25.5778 -71.8312)
(path /57D84708/580240C3)
(attr smd)
@@ -8126,6 +11981,13 @@
(fp_text value 0.047uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 209 VCC_5V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8142,7 +12004,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 74.5 -89.5 270)
(path /57D84708/580240C4)
(attr smd)
@@ -8152,6 +12014,13 @@
(fp_text value 0.01uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 150 "Net-(C11-Pad1)"))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8168,7 +12037,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 71.25 -92.5)
(path /57D84708/580240B5)
(attr smd)
@@ -8178,6 +12047,13 @@
(fp_text value 0.01uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8194,7 +12070,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 89.9922 -96.2152 180)
(path /57D8488D/5802409B)
(attr smd)
@@ -8204,6 +12080,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8220,7 +12103,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 89.4842 -81.6864 180)
(path /57D8488D/58024098)
(attr smd)
@@ -8230,6 +12113,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 212 "/Entropy source/RAW_NOISE"))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8246,7 +12136,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 77.343 -88.5444 180)
(path /57D8488D/580240A3)
(attr smd)
@@ -8256,6 +12146,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8272,7 +12169,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 28.925 -32.05)
(path /57D84936/58024080)
(attr smd)
@@ -8282,6 +12179,13 @@
(fp_text value 5.1pF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8298,7 +12202,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 28.175 -38.55 180)
(path /57D84936/58024089)
(attr smd)
@@ -8308,6 +12212,13 @@
(fp_text value 5.1pF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8324,7 +12235,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 13.125 -20.45 180)
(path /57D84936/58024087)
(attr smd)
@@ -8334,6 +12245,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8350,7 +12268,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 26.6 -23.3 90)
(path /57D84936/5802407E)
(attr smd)
@@ -8360,6 +12278,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 214 "/STM32 configuration/NRST"))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8376,7 +12301,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 50.6476 -49.3522 180)
(path /57D849FD/58024069)
(attr smd)
@@ -8386,6 +12311,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8402,7 +12334,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 65.4304 -35.6616 270)
(path /57D849FD/5802406A)
(attr smd)
@@ -8412,6 +12344,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8428,7 +12367,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 57.3532 -49.784 90)
(path /57D849FD/5802406B)
(attr smd)
@@ -8438,6 +12377,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8454,7 +12400,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 61.341 -15.9512)
(path /57D849FD/5802406D)
(attr smd)
@@ -8464,6 +12410,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8480,7 +12433,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 31.9278 -26.6192 270)
(path /57D849FD/5802406C)
(attr smd)
@@ -8490,6 +12443,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8506,7 +12466,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 30.5308 -41.4782 90)
(path /57D849FD/58024053)
(attr smd)
@@ -8516,6 +12476,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8532,7 +12499,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.9346 -49.784 90)
(path /57D849FD/58024061)
(attr smd)
@@ -8542,6 +12509,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8558,7 +12532,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 37.8 -20.5 90)
(path /57D849FD/58024054)
(attr smd)
@@ -8568,6 +12542,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8584,7 +12565,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 65.4304 -29.7434 90)
(path /57D849FD/58024062)
(attr smd)
@@ -8594,6 +12575,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8610,7 +12598,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 39.2 -20.3 90)
(path /57D849FD/58024055)
(attr smd)
@@ -8620,6 +12608,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8636,7 +12631,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 47.7266 -15.9512)
(path /57D849FD/58024064)
(attr smd)
@@ -8646,6 +12641,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8662,7 +12664,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 54.6862 -15.9512)
(path /57D849FD/58024056)
(attr smd)
@@ -8672,6 +12674,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8688,7 +12697,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 31.9278 -45.1358 270)
(path /57D849FD/58024065)
(attr smd)
@@ -8698,6 +12707,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8714,7 +12730,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 31.9278 -41.4782 90)
(path /57D849FD/58024057)
(attr smd)
@@ -8724,6 +12740,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8740,7 +12763,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 66.294 -21.971)
(path /57D849FD/58024066)
(attr smd)
@@ -8750,6 +12773,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8766,7 +12796,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 39.2176 -49.3522)
(path /57D849FD/58024058)
(attr smd)
@@ -8776,6 +12806,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8792,7 +12829,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 45.6438 -49.3522 180)
(path /57D849FD/58024067)
(attr smd)
@@ -8802,6 +12839,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8818,7 +12862,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 65.4304 -40.6146 90)
(path /57D849FD/58024059)
(attr smd)
@@ -8828,6 +12872,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8844,7 +12895,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 31.9278 -31.877 270)
(path /57D849FD/58024068)
(attr smd)
@@ -8854,6 +12905,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -8870,7 +12928,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 94.0562 -38.608 270)
(path /57D84B22/5802402F)
(attr smd)
@@ -8880,6 +12938,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8896,7 +12961,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 78.105 -41.2274 270)
(path /57D84B22/58024030)
(attr smd)
@@ -8906,6 +12971,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8922,7 +12994,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 94.0562 -55.9054 270)
(path /57D84B22/58024031)
(attr smd)
@@ -8932,6 +13004,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8948,7 +13027,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 78.105 -58.3946 90)
(path /57D84B22/58024033)
(attr smd)
@@ -8958,6 +13037,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -8974,7 +13060,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 94.0562 -45.9232 270)
(path /57D84B22/58024032)
(attr smd)
@@ -8984,6 +13070,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9000,7 +13093,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 78.105 -55.5244 90)
(path /57D84B22/58024034)
(attr smd)
@@ -9010,6 +13103,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9026,7 +13126,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 94.0562 -60.9934 90)
(path /57D84B22/58024043)
(attr smd)
@@ -9036,6 +13136,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9052,7 +13159,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 94.0562 -40.9956 90)
(path /57D84B22/58024035)
(attr smd)
@@ -9062,6 +13169,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9078,7 +13192,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 94.0562 -58.8772 270)
(path /57D84B22/58024044)
(attr smd)
@@ -9088,6 +13202,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9104,7 +13225,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 78.105 -45.3644 90)
(path /57D84B22/5802403B)
(attr smd)
@@ -9114,6 +13235,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9130,7 +13258,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 94.0562 -52.9082 270)
(path /57D84B22/58024045)
(attr smd)
@@ -9140,6 +13268,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9156,7 +13291,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 72.8222 -40.8924 90)
(path /57D84B22/58024039)
(attr smd)
@@ -9166,6 +13301,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9182,7 +13324,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 72.8472 -38.6826 270)
(path /57D84B22/5802403A)
(attr smd)
@@ -9192,6 +13334,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9208,7 +13357,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 72.8472 -60.9568 90)
(path /57D84B22/5802403C)
(attr smd)
@@ -9218,6 +13367,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9234,7 +13390,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 88.7222 -58.666 90)
(path /57D84B22/5802403E)
(attr smd)
@@ -9244,6 +13400,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9260,7 +13423,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 72.8472 -52.6288 270)
(path /57D84B22/5802403D)
(attr smd)
@@ -9270,6 +13433,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9286,7 +13456,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 88.7222 -41.148 270)
(path /57D84B22/5802403F)
(attr smd)
@@ -9296,6 +13466,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9312,7 +13489,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 72.8472 -58.5978 270)
(path /57D84B22/58024036)
(attr smd)
@@ -9322,6 +13499,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9338,7 +13522,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 88.7222 -55.5458 90)
(path /57D84B22/58024040)
(attr smd)
@@ -9348,6 +13532,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9364,7 +13555,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 72.8472 -45.5422 270)
(path /57D84B22/58024037)
(attr smd)
@@ -9374,6 +13565,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9390,7 +13588,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 88.7222 -45.4874 90)
(path /57D84B22/58024041)
(attr smd)
@@ -9400,6 +13598,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9416,7 +13621,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 72.8472 -55.6514 270)
(path /57D84B22/58024038)
(attr smd)
@@ -9426,6 +13631,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9442,7 +13654,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 39.1 -51.675)
(path /57D84C13/58024029)
(attr smd)
@@ -9452,6 +13664,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9468,7 +13687,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 22.1 -47.875 270)
(path /57D84C55/5802401F)
(attr smd)
@@ -9478,6 +13697,13 @@
(fp_text value 5.1pF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9494,7 +13720,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 19.3 -40.9 90)
(path /57D84C55/58024020)
(attr smd)
@@ -9504,6 +13730,13 @@
(fp_text value 5.1pF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9520,7 +13753,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 12.37202 -7.06602 180)
(path /57D84CB3/58023FE5)
(attr smd)
@@ -9530,6 +13763,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 144 FT_VREGIN))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9546,7 +13786,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 10.7198 -3.1844 270)
(path /57D84CB3/58023FEA)
(attr smd)
@@ -9556,6 +13796,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 217 "/User USB UART/FT_VCCORE"))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9572,7 +13819,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 19.8892 -4.8608 90)
(path /57D84CB3/58023FE7)
(attr smd)
@@ -9582,6 +13829,13 @@
(fp_text value 5.1pF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9598,7 +13852,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 9.2974 -3.1844 270)
(path /57D84CB3/58023FEB)
(attr smd)
@@ -9608,6 +13862,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 218 "/User USB UART/FT_VCCA"))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9624,7 +13885,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 19.8892 -7.1976 270)
(path /57D84CB3/58023FE8)
(attr smd)
@@ -9634,6 +13895,13 @@
(fp_text value 5.1pF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9650,7 +13918,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 22.325 -10.025 90)
(path /57D84CB3/58023FFD)
(attr smd)
@@ -9660,6 +13928,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 142 FT_VPHY))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9676,7 +13951,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 19.8892 -10.7282 90)
(path /57D84CB3/58023FFB)
(attr smd)
@@ -9686,6 +13961,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 143 FT_VPLL))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9702,7 +13984,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 12.5486 -3.5654)
(path /57D84CB3/58023FFE)
(attr smd)
@@ -9712,6 +13994,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 141 FT_VCC3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9728,7 +14017,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 16.0792 -3.5908)
(path /57D84CB3/58023FF9)
(attr smd)
@@ -9738,6 +14027,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 141 FT_VCC3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9754,7 +14050,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 19.8892 -12.8364 270)
(path /57D84CB3/58023FF8)
(attr smd)
@@ -9764,6 +14060,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 141 FT_VCC3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9780,7 +14083,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 11.5326 -15.7828)
(path /57D84CB3/58023FF7)
(attr smd)
@@ -9790,6 +14093,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 141 FT_VCC3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9806,7 +14116,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 82.50838 -18.33486 270)
(path /57D84E30/58023FAF)
(attr smd)
@@ -9816,6 +14126,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 137 FT_MGMT_VREGIN))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -9832,7 +14149,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 79.9592 -20.8976 180)
(path /57D84E30/58023FB4)
(attr smd)
@@ -9842,6 +14159,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 219 "/MGMT USB UART/FT_VCCORE1"))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9858,7 +14182,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 81.8 -11.825)
(path /57D84E30/58023FB1)
(attr smd)
@@ -9868,6 +14192,13 @@
(fp_text value 5.1pF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9884,7 +14215,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 79.925 -22.15 180)
(path /57D84E30/58023FB5)
(attr smd)
@@ -9894,6 +14225,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 220 "/MGMT USB UART/FT_VCCA1"))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9910,7 +14248,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 84.0994 -11.8298 180)
(path /57D84E30/58023FB2)
(attr smd)
@@ -9920,6 +14258,13 @@
(fp_text value 5.1pF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 3 GND))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9936,7 +14281,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 86.1314 -11.4234 270)
(path /57D84E30/58023FC7)
(attr smd)
@@ -9946,6 +14291,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 135 FT_MGMT_VPHY))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9962,7 +14314,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 87.7824 -11.4234 270)
(path /57D84E30/58023FC5)
(attr smd)
@@ -9972,6 +14324,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 136 FT_MGMT_VPLL))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -9988,7 +14347,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 80.391 -16.097 270)
(path /57D84E30/58023FC8)
(attr smd)
@@ -9998,6 +14357,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 134 FT_MGMT_VCC3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10014,7 +14380,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 89.2302 -11.4234 270)
(path /57D84E30/58023FC3)
(attr smd)
@@ -10024,6 +14390,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 134 FT_MGMT_VCC3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10040,7 +14413,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 92.202 -20.3134 270)
(path /57D84E30/58023FC2)
(attr smd)
@@ -10050,6 +14423,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 134 FT_MGMT_VCC3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10066,7 +14446,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 80.391 -19.1196 270)
(path /57D84E30/58023FC1)
(attr smd)
@@ -10076,6 +14456,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 134 FT_MGMT_VCC3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10092,7 +14479,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 31.5 8.5 270)
(path /57D84FAD/58023F9A)
(attr smd)
@@ -10102,6 +14489,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 1 3V3_BATT))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -10118,7 +14512,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 31.4842 1 270)
(path /57D85134/58023F67)
(attr smd)
@@ -10128,6 +14522,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -10144,7 +14545,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 55.9562 -67.8942)
(path /57D85217/58023F53)
(attr smd)
@@ -10154,6 +14555,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 125 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10170,7 +14578,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 34.3522 -30.1482 270)
(path /57D85260/58023F36)
(attr smd)
@@ -10180,6 +14588,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10196,7 +14611,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 66.2004 -88.4428 180)
(path /57D85260/58023F39)
(attr smd)
@@ -10206,6 +14621,13 @@
(fp_text value 0.01uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -10222,7 +14644,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 48.55 -29.475)
(path /57D85260/58023F37)
(attr smd)
@@ -10232,6 +14654,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10248,7 +14677,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 32.1818 -75.8444 90)
(path /57D853B0/58023F13)
(attr smd)
@@ -10258,6 +14687,13 @@
(fp_text value 0.047uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 159 "Net-(C115-Pad1)"))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -10274,7 +14710,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 13.95 -41.625 270)
(path /57D853B0/58023F12)
(attr smd)
@@ -10284,6 +14720,13 @@
(fp_text value 0.047uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 160 "Net-(C116-Pad1)"))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -10300,7 +14743,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 32.1818 -80.391 270)
(path /57D853B0/58023F10)
(attr smd)
@@ -10310,6 +14753,13 @@
(fp_text value 27pF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 161 "Net-(C117-Pad1)"))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -10326,7 +14776,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 13.975 -37.35 90)
(path /57D853B0/58023F11)
(attr smd)
@@ -10336,6 +14786,13 @@
(fp_text value 27pF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 163 "Net-(C118-Pad1)"))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -10352,7 +14809,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 71.075 -97.7 90)
(path /57D854CB/58023EF3)
(attr smd)
@@ -10362,6 +14819,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -10378,7 +14842,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 42 -93.5 180)
(path /57D854CB/58023EF2)
(attr smd)
@@ -10388,6 +14852,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10404,7 +14875,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.9346 -69.8754 180)
(path /57D855DE/58023E90)
(attr smd)
@@ -10414,6 +14885,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10430,7 +14908,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 57.9374 -72.898 180)
(path /57D855DE/58023EA6)
(attr smd)
@@ -10440,6 +14918,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10456,7 +14941,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.9346 -70.9168)
(path /57D855DE/58023E8C)
(attr smd)
@@ -10466,6 +14951,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10482,7 +14974,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.96 -63.8556)
(path /57D855DE/58023E89)
(attr smd)
@@ -10492,6 +14984,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10508,7 +15007,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 57.9374 -71.9074)
(path /57D855DE/58023E8B)
(attr smd)
@@ -10518,6 +15017,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10534,7 +15040,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 57.9628 -66.9036)
(path /57D855DE/58023E88)
(attr smd)
@@ -10544,6 +15050,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10560,7 +15073,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 57.4548 -70.4088 90)
(path /57D855DE/58023E8A)
(attr smd)
@@ -10570,6 +15083,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10586,7 +15106,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.96 -67.8942)
(path /57D855DE/58023EB0)
(attr smd)
@@ -10596,6 +15116,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10612,7 +15139,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 61.9506 -66.8782)
(path /57D855DE/58023EAF)
(attr smd)
@@ -10622,6 +15149,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10638,7 +15172,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.9346 -65.8876)
(path /57D855DE/58023EAE)
(attr smd)
@@ -10648,6 +15182,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10664,7 +15205,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 55.4736 -71.3994 90)
(path /57D855DE/58023EA7)
(attr smd)
@@ -10674,6 +15215,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 125 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10690,7 +15238,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 58.9788 -65.8876)
(path /57D855DE/58023EAD)
(attr smd)
@@ -10700,6 +15248,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10716,7 +15271,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 55.4736 -73.406 90)
(path /57D855DE/58023EA5)
(attr smd)
@@ -10726,6 +15281,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 125 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10742,7 +15304,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 58.9534 -64.8462 180)
(path /57D855DE/58023EAC)
(attr smd)
@@ -10752,6 +15314,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10768,7 +15337,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 58.9534 -70.8914)
(path /57D855DE/58023EA4)
(attr smd)
@@ -10778,6 +15347,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 125 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10794,7 +15370,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.9346 -64.8462 180)
(path /57D855DE/58023EAB)
(attr smd)
@@ -10804,6 +15380,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10820,7 +15403,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 57.4548 -65.3796 90)
(path /57D855DE/58023EA3)
(attr smd)
@@ -10830,6 +15413,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 125 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10846,7 +15436,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 57.9374 -63.881 180)
(path /57D855DE/58023EAA)
(attr smd)
@@ -10856,6 +15446,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10872,7 +15469,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 55.4228 -65.3796 270)
(path /57D855DE/58023EA2)
(attr smd)
@@ -10882,6 +15479,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 125 FPGA_VCCAUX_1V8))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10898,7 +15502,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.9346 -71.9074 180)
(path /57D855DE/58023EA9)
(attr smd)
@@ -10908,6 +15512,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10924,7 +15535,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 59.436 -72.39 90)
(path /57D855DE/58023EA8)
(attr smd)
@@ -10934,6 +15545,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10950,7 +15568,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.96 -72.898)
(path /57D855DE/58023EA1)
(attr smd)
@@ -10960,6 +15578,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 126 FPGA_VCCINT_1V0))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -10976,7 +15601,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 48.4378 -62.3824 270)
(path /57D8583B/58023E5E)
(attr smd)
@@ -10986,6 +15611,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11002,7 +15634,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 47.9552 -59.8678)
(path /57D8583B/58023E3B)
(attr smd)
@@ -11012,6 +15644,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11028,7 +15667,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 53.467 -79.4258 90)
(path /57D8583B/58023E37)
(attr smd)
@@ -11038,6 +15677,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11054,7 +15700,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 61.9506 -61.9244 180)
(path /57D8583B/58023E5A)
(attr smd)
@@ -11064,6 +15710,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11080,7 +15733,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 49.9364 -69.8754 180)
(path /57D8583B/58023E56)
(attr smd)
@@ -11090,6 +15743,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11106,7 +15766,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 55.4736 -75.4126 90)
(path /57D8583B/58023E51)
(attr smd)
@@ -11116,6 +15776,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11132,7 +15799,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 44.6786 -63.3984 270)
(path /57D8583B/58023E53)
(attr smd)
@@ -11142,6 +15809,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11158,7 +15832,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 53.0098 -56.9976 180)
(path /57D8583B/58023E3A)
(attr smd)
@@ -11168,6 +15842,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11184,7 +15865,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 52.451 -75.3872 270)
(path /57D8583B/58023E5D)
(attr smd)
@@ -11194,6 +15875,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11210,7 +15898,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 67.818 -64.7446)
(path /57D8583B/58023E59)
(attr smd)
@@ -11220,6 +15908,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11236,7 +15931,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 52.959 -67.9196 180)
(path /57D8583B/58023E55)
(attr smd)
@@ -11246,6 +15941,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11262,7 +15964,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 46.4312 -78.4098 90)
(path /57D8583B/58023E50)
(attr smd)
@@ -11272,6 +15974,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11288,7 +15997,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 49.4538 -66.3956 90)
(path /57D8583B/58023E48)
(attr smd)
@@ -11298,6 +16007,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11314,7 +16030,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 49.9364 -58.9026 180)
(path /57D8583B/58023E39)
(attr smd)
@@ -11324,6 +16040,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11340,7 +16063,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 48.9458 -76.9112 180)
(path /57D8583B/58023E5C)
(attr smd)
@@ -11350,6 +16073,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11366,7 +16096,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 60.452 -62.4078 270)
(path /57D8583B/58023E58)
(attr smd)
@@ -11376,6 +16106,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11392,7 +16129,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 47.9552 -67.8942)
(path /57D8583B/58023E54)
(attr smd)
@@ -11402,6 +16139,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11418,7 +16162,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 50.927 -80.7974)
(path /57D8583B/58023E4F)
(attr smd)
@@ -11428,6 +16172,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11444,7 +16195,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 63.9318 -67.8942 180)
(path /57D8583B/58023E3D)
(attr smd)
@@ -11454,6 +16205,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11470,7 +16228,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 50.9524 -61.8998 180)
(path /57D8583B/58023E38)
(attr smd)
@@ -11480,6 +16238,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11496,7 +16261,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 51.4604 -72.39 270)
(path /57D8583B/58023E5B)
(attr smd)
@@ -11506,6 +16271,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11522,7 +16294,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 67.4624 -67.3862 90)
(path /57D8583B/58023E57)
(attr smd)
@@ -11532,6 +16304,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11548,7 +16327,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 45.9486 -66.8782 180)
(path /57D8583B/58023E52)
(attr smd)
@@ -11558,6 +16337,13 @@
(fp_text value 0.47uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11574,7 +16360,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 44.59546 -75.27194 90)
(path /57D8583B/58023E4E)
(attr smd)
@@ -11584,6 +16370,13 @@
(fp_text value 0.47uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 210 VCCO_3V3))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11600,7 +16393,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 24.4856 -62.8904 180)
(path /57D85A75/58023E28)
(attr smd)
@@ -11610,6 +16403,13 @@
(fp_text value 0.047uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 165 "Net-(C207-Pad1)"))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -11626,7 +16426,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer B.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 26.924 -62.8904 180)
(path /57D85A75/58023E23)
(attr smd)
@@ -11636,6 +16436,13 @@
(fp_text value 27pF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)) (justify mirror))
+ )
+ (fp_line (start -0.762 -0.381) (end -0.762 0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end -0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.Fab) (width 0.1))
+ (fp_line (start -0.762 0.381) (end 0.762 0.381) (layer B.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
(net 166 "Net-(C208-Pad1)"))
(pad 2 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
@@ -11652,7 +16459,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 24.003 -63.0936 90)
(path /57D85B19/58023E13)
(attr smd)
@@ -11662,6 +16469,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 204 PWR_ENA_VCCINT))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11678,7 +16492,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 14.8336 -47.2694 90)
(path /57D85B19/58023E12)
(attr smd)
@@ -11688,6 +16502,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 205 PWR_ENA_VCCO))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11704,7 +16525,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 30.9118 -76.327 90)
(path /57D85B19/58023E11)
(attr smd)
@@ -11714,6 +16535,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 203 PWR_ENA_VCCAUX))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11730,7 +16558,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 36 -14.5 90)
(path /57D84CB3/58023FEE)
(attr smd)
@@ -11740,6 +16568,13 @@
(fp_text value 0.1uF (at 0 0 90) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0 90) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 144 FT_VREGIN))
(pad 2 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11756,7 +16591,7 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (module Cryptech_Alpha_Footprints:C_0402 (layer F.Cu) (tedit 60BD3CB0) (tstamp 539EEDBF)
(at 72.9 -16.7)
(path /57D84E30/58023FB8)
(attr smd)
@@ -11766,6 +16601,13 @@
(fp_text value 0.1uF (at 0 0) (layer Cmts.User)
(effects (font (size 1.524 1.524) (thickness 0.05)))
)
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.3 0.3) (thickness 0.025)))
+ )
+ (fp_line (start -0.762 0.381) (end -0.762 -0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 0.381) (end -0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.762 -0.381) (end 0.762 -0.381) (layer F.Fab) (width 0.1))
(pad 1 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
(net 137 FT_MGMT_VREGIN))
(pad 2 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
@@ -11782,3332 +16624,1206 @@
)
)
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 72.5 -86.5 180)
- (path /57D84708/580240BA)
- (attr smd)
- (fp_text reference C7 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 202 PWR_18V))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 76.25 -87.75 270)
- (path /57D84708/580240B9)
- (attr smd)
- (fp_text reference C13 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 2 15V_STABLE))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 29.718 -26.5684 270)
- (path /57D849FD/5802406E)
- (attr smd)
- (fp_text reference C26 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
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- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
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- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
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- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 45.6946 -51.3334 180)
- (path /57D849FD/58024063)
- (attr smd)
- (fp_text reference C27 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 19.77586 -5.96143)
- (path /57D84CB3/58023FE6)
- (attr smd)
- (fp_text reference C72 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
- (net 144 FT_VREGIN))
- (pad 2 smd rect (at 1 0) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 25.8074 -9.89 270)
- (path /57D84CB3/58023FFC)
- (attr smd)
- (fp_text reference C77 (at 0 0 90) (layer F.SilkS) hide
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- )
- (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 142 FT_VPHY))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 24.2072 -15.8844 90)
- (path /57D84CB3/58023FFA)
- (attr smd)
- (fp_text reference C80 (at 0 0 90) (layer F.SilkS) hide
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- )
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 143 FT_VPLL))
- (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 7.7734 -15.0716 90)
- (path /57D84CB3/58023FFF)
- (attr smd)
- (fp_text reference C82 (at 0 0 90) (layer F.SilkS) hide
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- )
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 141 FT_VCC3V3))
- (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 78.40381 -17.07095 90)
- (path /57D84E30/58023FB0)
- (attr smd)
- (fp_text reference C87 (at 0 0 90) (layer F.SilkS) hide
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- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
- (net 137 FT_MGMT_VREGIN))
- (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 86.419 -7.0668 270)
- (path /57D84E30/58023FC6)
- (attr smd)
- (fp_text reference C92 (at 0 0 90) (layer F.SilkS) hide
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- )
- (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 135 FT_MGMT_VPHY))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 91.186 -7.207 270)
- (path /57D84E30/58023FC4)
- (attr smd)
- (fp_text reference C95 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 136 FT_MGMT_VPLL))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 90 -25 180)
- (path /57D84E30/58023FC9)
- (attr smd)
- (fp_text reference C97 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 134 FT_MGMT_VCC3V3))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 52.07 -83.0072)
- (path /57D855DE/58023E94)
- (attr smd)
- (fp_text reference C132 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 125 FPGA_VCCAUX_1V8))
- (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 43.9928 -71.6788 270)
- (path /57D855DE/58023E93)
- (attr smd)
- (fp_text reference C136 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 125 FPGA_VCCAUX_1V8))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 52.07 -85.725)
- (path /57D855DE/58023E92)
- (attr smd)
- (fp_text reference C139 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 125 FPGA_VCCAUX_1V8))
- (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 61.849 -81.5594)
- (path /57D855DE/58023EB1)
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- (fp_text reference C140 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 60.1218 -55.118 270)
- (path /57D855DE/58023E9A)
- (attr smd)
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
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- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 71.6788 -71.0184 90)
- (path /57D855DE/58023EA0)
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
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- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
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- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 43.9166 -67.1068 270)
- (path /57D855DE/58023E99)
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
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- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
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- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 41.4274 -67.1068 270)
- (path /57D855DE/58023E9F)
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- )
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
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- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 69.2658 -70.9676 90)
- (path /57D855DE/58023E98)
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- )
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
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- )
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- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
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- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 57.3024 -84.0232 180)
- (path /57D855DE/58023E9E)
- (attr smd)
- (fp_text reference C152 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 70.485 -66.6496 270)
- (path /57D855DE/58023E97)
- (attr smd)
- (fp_text reference C153 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 56.7436 -53.7972 180)
- (path /57D855DE/58023E9D)
- (attr smd)
- (fp_text reference C156 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 57.3024 -81.5594 180)
- (path /57D855DE/58023E96)
- (attr smd)
- (fp_text reference C157 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 41.402 -71.6788 90)
- (path /57D855DE/58023E9C)
- (attr smd)
- (fp_text reference C160 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 56.769 -56.1848 180)
- (path /57D855DE/58023E95)
- (attr smd)
- (fp_text reference C161 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 126 FPGA_VCCINT_1V0))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 63.246 -54.74298 270)
- (path /57D8583B/58023E4D)
- (attr smd)
- (fp_text reference C169 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 42.7736 -82.0674 180)
- (path /57D8583B/58023E4A)
- (attr smd)
- (fp_text reference C170 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 42.8244 -79.2734 180)
- (path /57D8583B/58023E49)
- (attr smd)
- (fp_text reference C171 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 40.1574 -63.0428 270)
- (path /57D8583B/58023E45)
- (attr smd)
- (fp_text reference C172 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 42.5958 -63.0428 270)
- (path /57D8583B/58023E44)
- (attr smd)
- (fp_text reference C173 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 52.2986 -54.9148 180)
- (path /57D8583B/58023E41)
- (attr smd)
- (fp_text reference C174 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 180) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 69.2658 -78.9432 90)
- (path /57D8583B/58023E4C)
- (attr smd)
- (fp_text reference C175 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 65.4558 -55.118 270)
- (path /57D8583B/58023E4B)
- (attr smd)
- (fp_text reference C176 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 66.1162 -81.5594)
- (path /57D8583B/58023E47)
- (attr smd)
- (fp_text reference C177 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 42.6212 -75.9206 90)
- (path /57D8583B/58023E46)
- (attr smd)
- (fp_text reference C178 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 90) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 69.2658 -74.8284 270)
- (path /57D8583B/58023E43)
- (attr smd)
- (fp_text reference C179 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0 270) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:C_0805 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 47.4472 -56.0832)
- (path /57D8583B/58023E42)
- (attr smd)
- (fp_text reference C180 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7uF (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at -1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at 1 0) (size 1 1.2) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0805 SMD Capacitor.wrl"
- (offset (xyz 0 -0.02489199962615967 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 0))
- )
- (model wrlshp/68E8DA21-73BF.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 360))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 27.5 -81.4 270)
- (path /57D84708/580240AE)
- (attr smd)
- (fp_text reference R1 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 56k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 188 "Net-(R1-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 202 PWR_18V))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 27.5 -79.2 270)
- (path /57D84708/580240AF)
- (attr smd)
- (fp_text reference R2 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
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- (fp_text value 4.64k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 188 "Net-(R1-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 25.7048 -80.8308)
- (path /57D84708/580240B0)
- (attr smd)
- (fp_text reference R3 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
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- (fp_text value 100 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 188 "Net-(R1-Pad1)"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 189 "Net-(R3-Pad2)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 64.4906 -82.931 270)
- (path /57D85260/58023F41)
- (attr smd)
- (fp_text reference R4 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 98 FPGA_GCLK))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 187 "Net-(Q5-Pad3)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 71.75 -99.5 180)
- (path /57D84708/580240BC)
- (attr smd)
- (fp_text reference R5 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 1k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 97 FPGA_ENTROPY_DISABLE))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 185 "Net-(Q1-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 71.75 -98.25)
- (path /57D84708/580240BD)
- (attr smd)
- (fp_text reference R6 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 185 "Net-(Q1-Pad1)"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 71 -89.5 270)
- (path /57D84708/580240B1)
- (attr smd)
- (fp_text reference R7 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 202 PWR_18V))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 243 /Power/15V_LDO_ENABLE))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 25.5778 -73.1774)
- (path /57D84708/580240AC)
- (attr smd)
- (fp_text reference R8 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 6.3k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 190 "Net-(R8-Pad1)"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 28.194 -72.6186 270)
- (path /57D84708/580240AB)
- (attr smd)
- (fp_text reference R9 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 1.21k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 190 "Net-(R8-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 87.0966 -93.2434 270)
- (path /57D8488D/5802409A)
- (attr smd)
- (fp_text reference R10 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 470 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 212 "/Entropy source/RAW_NOISE"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 211 "/Entropy source/NOISE_IN"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 90.9828 -84.6328)
- (path /57D8488D/58024099)
- (attr smd)
- (fp_text reference R11 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 1k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 2 15V_STABLE))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 212 "/Entropy source/RAW_NOISE"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 84.6582 -86.106)
- (path /57D8488D/58024097)
- (attr smd)
- (fp_text reference R12 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 4 "Net-(C15-Pad2)"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 225 "/Entropy source/AMPLIFIED"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 80.6958 -81.8896 90)
- (path /57D8488D/58024096)
- (attr smd)
- (fp_text reference R13 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 1k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 225 "/Entropy source/AMPLIFIED"))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 210 VCCO_3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 31.9278 -34.671 90)
- (path /57D84936/5802407D)
- (attr smd)
- (fp_text reference R14 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 247 "/STM32 configuration/OSC_IN"))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 152 "Net-(C17-Pad2)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 40.9702 -20.0406 180)
- (path /57D84936/5802407F)
- (attr smd)
- (fp_text reference R15 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 248 "/STM32 configuration/BOOT0"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 45 -7.5 270)
- (path /57D84936/58024082)
- (attr smd)
- (fp_text reference R16 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 173 "Net-(LED4-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 11 ARM_LED3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 27.4402 -50.393 180)
- (path /57D84C13/58024028)
- (attr smd)
- (fp_text reference R17 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 168 "Net-(IC1-Pad3)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 27.425 -52.9 180)
- (path /57D84C13/5802402A)
- (attr smd)
- (fp_text reference R18 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 145 KSM_PROM_CS_N))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 31.3086 -41.629)
- (path /57D84C55/5802401B)
- (attr smd)
- (fp_text reference R19 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 208 RTC_SDA))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 30.6832 -42.799)
- (path /57D84C55/5802401C)
- (attr smd)
- (fp_text reference R20 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 207 RTC_SCL))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 30.6832 -44.0944)
- (path /57D84C55/5802401D)
- (attr smd)
- (fp_text reference R21 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 206 RTC_MFP))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 20.2956 -9.1534 180)
- (path /57D84CB3/58023FE9)
- (attr smd)
- (fp_text reference R22 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 12k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 249 "/User USB UART/FT_REF"))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 7.621 -7.3754 90)
- (path /57D84CB3/58023FF5)
+ (module Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm (layer B.Cu) (tedit 5DC5F6A5) (tstamp 5F0C4CB2)
+ (at 80 -30)
+ (descr "QFN, 48 Pin (http://www.st.com/resource/en/datasheet/stm32f042k6.pdf#page=94), generated with kicad-footprint-generator ipc_noLead_generator.py")
+ (tags "QFN NoLead")
+ (path /57D8509E/5EF0D127)
(attr smd)
- (fp_text reference R23 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 250 "/User USB UART/FT_RESET"))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 141 FT_VCC3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (fp_text reference U11 (at 0 4.82) (layer B.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 88.525 -9.4 180)
- (path /57D84E30/58023FB3)
- (attr smd)
- (fp_text reference R26 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text value ICE40UP5K-SG48I (at 0 -4.82) (layer B.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
- (fp_text value 12k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_line (start 3.135 3.61) (end 3.61 3.61) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.61 3.61) (end 3.61 3.135) (layer B.SilkS) (width 0.12))
+ (fp_line (start -3.135 -3.61) (end -3.61 -3.61) (layer B.SilkS) (width 0.12))
+ (fp_line (start -3.61 -3.61) (end -3.61 -3.135) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.135 -3.61) (end 3.61 -3.61) (layer B.SilkS) (width 0.12))
+ (fp_line (start 3.61 -3.61) (end 3.61 -3.135) (layer B.SilkS) (width 0.12))
+ (fp_line (start -3.135 3.61) (end -3.61 3.61) (layer B.SilkS) (width 0.12))
+ (fp_line (start -2.5 3.5) (end 3.5 3.5) (layer B.Fab) (width 0.1))
+ (fp_line (start 3.5 3.5) (end 3.5 -3.5) (layer B.Fab) (width 0.1))
+ (fp_line (start 3.5 -3.5) (end -3.5 -3.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -3.5 -3.5) (end -3.5 2.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -3.5 2.5) (end -2.5 3.5) (layer B.Fab) (width 0.1))
+ (fp_line (start -4.12 4.12) (end -4.12 -4.12) (layer B.CrtYd) (width 0.05))
+ (fp_line (start -4.12 -4.12) (end 4.12 -4.12) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 4.12 -4.12) (end 4.12 4.12) (layer B.CrtYd) (width 0.05))
+ (fp_line (start 4.12 4.12) (end -4.12 4.12) (layer B.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0) (layer B.Fab)
+ (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
)
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 251 "/MGMT USB UART/FT_REF1"))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad "" smd roundrect (at 2.1 -2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at 2.1 -0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at 2.1 0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at 2.1 2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at 0.7 -2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at 0.7 -0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at 0.7 0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at 0.7 2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at -0.7 -2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at -0.7 -0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at -0.7 0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at -0.7 2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at -2.1 -2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at -2.1 -0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at -2.1 0.7) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad "" smd roundrect (at -2.1 2.1) (size 1.13 1.13) (layers B.Paste) (roundrect_rratio 0.221239))
+ (pad 49 smd rect (at 0 0) (size 5.6 5.6) (layers B.Cu B.Mask)
(net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 84.1756 -24.384)
- (path /57D84E30/58023FBF)
- (attr smd)
- (fp_text reference R27 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 252 "/MGMT USB UART/FT_RESET1"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 134 FT_MGMT_VCC3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 28 -7.5 270)
- (path /57D84FAD/58023F96)
- (attr smd)
- (fp_text reference R31 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 177 "Net-(LED12-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (pad 48 smd roundrect (at -2.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 605 ICE40_LED2))
+ (pad 47 smd roundrect (at -2.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 603 ICE40_LED3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 36.2204 -22.8854 90)
- (path /57D849FD/5802405B)
- (attr smd)
- (fp_text reference R32 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 46 smd roundrect (at -1.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 607 ICE40_LED4))
+ (pad 45 smd roundrect (at -1.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 606 ICE40_LED1))
+ (pad 44 smd roundrect (at -0.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 604 ICE40_PANIC))
+ (pad 43 smd roundrect (at -0.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 602 ICE40_GPIO_0))
+ (pad 42 smd roundrect (at 0.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 595 ICE40_GPIO_1))
+ (pad 41 smd roundrect (at 0.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 601 ICE40_GPIO_2))
+ (pad 40 smd roundrect (at 1.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 596 ICE40_GPIO_7))
+ (pad 39 smd roundrect (at 1.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 597 ICE40_GPIO_6))
+ (pad 38 smd roundrect (at 2.25 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 598 ICE40_GPIO_5))
+ (pad 37 smd roundrect (at 2.75 3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 599 ICE40_GPIO_4))
+ (pad 36 smd roundrect (at 3.4375 2.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 600 ICE40_GPIO_3))
+ (pad 35 smd roundrect (at 3.4375 2.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 613 ICE40_GPIO_FPGA_7))
+ (pad 34 smd roundrect (at 3.4375 1.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 615 ICE40_GPIO_FPGA_6))
+ (pad 33 smd roundrect (at 3.4375 1.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
(net 1 3V3_BATT))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 191 "Net-(R32-Pad2)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 79 -7.375 270)
- (path /57D85134/58023F58)
- (attr smd)
- (fp_text reference R38 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 178 "Net-(LED13-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 39.25 -71.575 180)
- (path /57D85134/58023F69)
- (attr smd)
- (fp_text reference R39 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 100 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 96 FPGA_DONE))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 244 "/Config interface/FPGA_DONE_INT"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 84.209 -71.7296)
- (path /57D85134/58023F5C)
- (attr smd)
- (fp_text reference R40 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 246 "/Config interface/FPGA_INIT_B_INT"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 35.2 -67.65)
- (path /57D85134/58023F5D)
- (attr smd)
- (fp_text reference R41 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 124 FPGA_PROGRAM_B))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 92.9132 -72.1106)
- (path /57D85134/58023F5A)
- (attr smd)
- (fp_text reference R42 (at 0 0) (layer F.SilkS) hide
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- (net 256 "/Config interface/FPGA_JTAG_TDI"))
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- (net 210 VCCO_3V3))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 94.3102 -65.8622)
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- (net 257 "/Config interface/FPGA_JTAG_TMS"))
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- (net 210 VCCO_3V3))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 94.3102 -63.3476)
- (path /57D85134/58023F64)
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- (net 258 "/Config interface/FPGA_JTAG_TCK"))
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- (net 210 VCCO_3V3))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 12.9 -32.825 90)
- (path /57D85260/58023F35)
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- (net 231 "/Config memory/SPI_A_TRISTATE"))
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- (net 210 VCCO_3V3))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 12.875 -28.55 90)
- (path /57D85260/58023F34)
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- (net 227 "/Config memory/SPI_B_TRISTATE"))
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- (net 3 GND))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 68.58 -88.4428)
- (path /57D85260/58023F38)
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- (net 186 "Net-(Q5-Pad1)"))
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- (net 210 VCCO_3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
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- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 13 -24.2 270)
- (path /57D85260/58023F3A)
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- (net 3 GND))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 232 "/Config memory/FPGA_PROM_W_N"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
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- (at (xyz 0 0 0))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 42.525 -29.475)
- (path /57D85260/58023F3B)
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- (net 226 "/Config memory/FPGA_PROM_CS_N"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
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- (at (xyz 0 0 0))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 35.2298 -71.8058 180)
- (path /57D853B0/58023F0A)
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- (net 192 "Net-(R52-Pad1)"))
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- (net 209 VCC_5V0))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
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- (at (xyz 0 0 0))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 30.8102 -75.8444 90)
- (path /57D853B0/58023F0E)
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- (net 3 GND))
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- (net 193 "Net-(R53-Pad2)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
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- (at (xyz 0 0 0))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 11.0918 -45.72)
- (path /57D853B0/58023F18)
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- (net 194 "Net-(R54-Pad1)"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
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- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 15.5194 -41.7322 270)
- (path /57D853B0/58023F04)
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- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 195 "Net-(R55-Pad2)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 30.8102 -80.391 270)
- (path /57D853B0/58023F09)
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
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- (net 162 "Net-(C117-Pad2)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 161 "Net-(C117-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 31.5468 -78.105 270)
- (path /57D853B0/58023F08)
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- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 162 "Net-(C117-Pad2)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
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- (at (xyz 0 0 0))
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- )
- )
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 15.367 -37.338 90)
- (path /57D853B0/58023F17)
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- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 164 "Net-(C118-Pad2)"))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 163 "Net-(C118-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
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- (at (xyz 0 0 0))
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- )
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 14.732 -39.5478 90)
- (path /57D853B0/58023F16)
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- )
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- (net 3 GND))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 164 "Net-(C118-Pad2)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 36.6 -81.475 180)
- (path /57D853B0/58023F07)
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- (net 3 GND))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 161 "Net-(C117-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
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- (at (xyz 0 0 0))
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- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 9.525 -35.8648)
- (path /57D853B0/58023F15)
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- (net 3 GND))
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- (net 163 "Net-(C118-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 84.209 -73.1266)
- (path /57D85134/58023F63)
- (attr smd)
- (fp_text reference R62 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 246 "/Config interface/FPGA_INIT_B_INT"))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 259 "/Config interface/FPGA_INIT_B_INT1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 37.225 -67.65 180)
- (path /57D85134/58023F62)
- (attr smd)
- (fp_text reference R63 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 124 FPGA_PROGRAM_B))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 260 "/Config interface/FPGA_PROGRAM_B1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 81 -7 270)
- (path /57D854CB/58023EF6)
- (attr smd)
- (fp_text reference R64 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 180 "Net-(LED15-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 116 FPGA_GPIO_LED_1))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 44.7 -61.35 90)
- (path /57D8556F/58023EEB)
- (attr smd)
- (fp_text reference R65 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 1k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 196 "Net-(R65-Pad1)"))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 22.0726 -62.8904 180)
- (path /57D85A75/58023E2C)
- (attr smd)
- (fp_text reference R66 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 197 "Net-(R66-Pad1)"))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 209 VCC_5V0))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 29.3116 -62.8904 180)
- (path /57D85A75/58023E20)
- (attr smd)
- (fp_text reference R67 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 198 "Net-(R67-Pad1)"))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 26.924 -64.5668 180)
- (path /57D85A75/58023E25)
- (attr smd)
- (fp_text reference R68 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 150k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 167 "Net-(C208-Pad2)"))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
+ (pad 32 smd roundrect (at 3.4375 0.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 614 ICE40_GPIO_FPGA_5))
+ (pad 31 smd roundrect (at 3.4375 0.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 616 ICE40_GPIO_FPGA_4))
+ (pad 30 smd roundrect (at 3.4375 -0.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (pad 29 smd roundrect (at 3.4375 -0.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 573 "/Master Key Memory/MKM_VCC_PLL"))
+ (pad 28 smd roundrect (at 3.4375 -1.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 348 "Net-(U11-Pad28)"))
+ (pad 27 smd roundrect (at 3.4375 -1.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 610 ICE40_FPGA_MOSI))
+ (pad 26 smd roundrect (at 3.4375 -2.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 608 ICE40_FPGA_MISO))
+ (pad 25 smd roundrect (at 3.4375 -2.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 609 ICE40_FPGA_CS_N))
+ (pad 24 smd roundrect (at 2.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 572 "/Master Key Memory/MKM_VPP"))
+ (pad 23 smd roundrect (at 2.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 611 ICE40_FPGA_SCK))
+ (pad 22 smd roundrect (at 1.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 1 3V3_BATT))
+ (pad 21 smd roundrect (at 1.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 590 ICE40_GPIO_FPGA_0))
+ (pad 20 smd roundrect (at 0.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 591 ICE40_GPIO_FPGA_1))
+ (pad 19 smd roundrect (at 0.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 593 ICE40_GPIO_FPGA_2))
+ (pad 18 smd roundrect (at -0.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 592 ICE40_GPIO_FPGA_3))
+ (pad 17 smd roundrect (at -0.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 580 "/Master Key Memory/ICE40_SPI_SI"))
+ (pad 16 smd roundrect (at -1.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 581 "/Master Key Memory/ICE40_SPI_SS"))
+ (pad 15 smd roundrect (at -1.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 582 "/Master Key Memory/ICE40_SPI_SCK"))
+ (pad 14 smd roundrect (at -2.25 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 583 "/Master Key Memory/ICE40_SPI_SO"))
+ (pad 13 smd roundrect (at -2.75 -3.4375) (size 0.25 0.875) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 349 "Net-(U11-Pad13)"))
+ (pad 12 smd roundrect (at -3.4375 -2.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 587 ICE40_GPIO_ARM_1))
+ (pad 11 smd roundrect (at -3.4375 -2.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 588 ICE40_GPIO_ARM_2))
+ (pad 10 smd roundrect (at -3.4375 -1.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 586 ICE40_GPIO_ARM_0))
+ (pad 9 smd roundrect (at -3.4375 -1.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 589 ICE40_GPIO_ARM_3))
+ (pad 8 smd roundrect (at -3.4375 -0.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 585 ICE40_CRESET))
+ (pad 7 smd roundrect (at -3.4375 -0.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 584 ICE40_CDONE))
+ (pad 6 smd roundrect (at -3.4375 0.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 350 "Net-(U11-Pad6)"))
+ (pad 5 smd roundrect (at -3.4375 0.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 571 "/Master Key Memory/MKM_VCC"))
+ (pad 4 smd roundrect (at -3.4375 1.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 570 "Net-(U11-Pad4)"))
+ (pad 3 smd roundrect (at -3.4375 1.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 594 ICE40_JUMPER))
+ (pad 2 smd roundrect (at -3.4375 2.25) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 617 "Net-(U11-Pad2)"))
+ (pad 1 smd roundrect (at -3.4375 2.75) (size 0.875 0.25) (layers B.Cu B.Paste B.Mask) (roundrect_rratio 0.25)
+ (net 1 3V3_BATT))
+ (model ${KISYS3DMOD}/Package_DFN_QFN.3dshapes/QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 24.4856 -64.5668 180)
- (path /57D85A75/58023E24)
- (attr smd)
- (fp_text reference R69 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 226k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 3 GND))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 167 "Net-(C208-Pad2)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (module Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical (layer F.Cu) (tedit 59FED5CC) (tstamp 5F286543)
+ (at 96 -34)
+ (descr "Through hole straight pin header, 1x08, 2.54mm pitch, single row")
+ (tags "Through hole pin header THT 1x08 2.54mm single row")
+ (path /57D8509E/5F109687)
+ (fp_text reference J5 (at -2.02 -0.29 270) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 30.3022 -64.5668)
- (path /57D85A75/58023E21)
- (attr smd)
- (fp_text reference R70 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text value PLS-8 (at 0 20.11) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 100 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_line (start 1.8 -1.8) (end -1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.8 19.55) (end 1.8 -1.8) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 19.55) (end 1.8 19.55) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.8 -1.8) (end -1.8 19.55) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.33 -1.33) (end 0 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 0) (end -1.33 -1.33) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end 1.33 1.27) (layer F.SilkS) (width 0.12))
+ (fp_line (start 1.33 1.27) (end 1.33 19.11) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 1.27) (end -1.33 19.11) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.33 19.11) (end 1.33 19.11) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.27 -0.635) (end -0.635 -1.27) (layer F.Fab) (width 0.1))
+ (fp_line (start -1.27 19.05) (end -1.27 -0.635) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 19.05) (end -1.27 19.05) (layer F.Fab) (width 0.1))
+ (fp_line (start 1.27 -1.27) (end 1.27 19.05) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
+ (fp_text user %R (at 0 8.89 90) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
+ (pad 8 thru_hole oval (at 0 17.78) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 582 "/Master Key Memory/ICE40_SPI_SCK"))
+ (pad 7 thru_hole oval (at 0 15.24) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 3 GND))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 166 "Net-(C208-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 37.275 -69.025 180)
- (path /57D85134/58023F61)
- (attr smd)
- (fp_text reference R71 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 95 FPGA_CFG_SCLK))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 261 "/Config interface/FPGA_CFG_SCLK1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 17.78 -63.0936 90)
- (path /57D85B19/58023E17)
- (attr smd)
- (fp_text reference R72 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 100k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 209 VCC_5V0))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 204 PWR_ENA_VCCINT))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 10.9982 -50.165 180)
- (path /57D85B19/58023E0C)
- (attr smd)
- (fp_text reference R73 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 199 POK_VCCAUX))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 209 VCC_5V0))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 11.5 -44.7 180)
- (path /57D85B19/58023E0B)
- (attr smd)
- (fp_text reference R74 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 100k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 199 POK_VCCAUX))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 205 PWR_ENA_VCCO))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 12.9712 -42.1566 90)
- (path /57D85B19/58023E09)
- (attr smd)
- (fp_text reference R77 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 4.7k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 201 POK_VCCO))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 209 VCC_5V0))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 83.4 -4.8)
- (path /57D85B19/58023E14)
- (attr smd)
- (fp_text reference R78 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 209 VCC_5V0))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 183 "Net-(LED18-Pad1)"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 76.8 -26.8)
- (path /57D84FAD/58023F99)
- (attr smd)
- (fp_text reference R82 (at 0 0) (layer B.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)) (justify mirror))
- )
- (fp_text value 15k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 604 ICE40_PANIC))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
+ (pad 6 thru_hole oval (at 0 12.7) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 584 ICE40_CDONE))
+ (pad 5 thru_hole oval (at 0 10.16) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 585 ICE40_CRESET))
+ (pad 4 thru_hole oval (at 0 7.62) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 581 "/Master Key Memory/ICE40_SPI_SS"))
+ (pad 3 thru_hole oval (at 0 5.08) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 580 "/Master Key Memory/ICE40_SPI_SI"))
+ (pad 2 thru_hole oval (at 0 2.54) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
+ (net 583 "/Master Key Memory/ICE40_SPI_SO"))
+ (pad 1 thru_hole rect (at 0 0) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 1 3V3_BATT))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 37.15 -66 180)
- (path /57D8556F/58023EEA)
- (attr smd)
- (fp_text reference R83 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 94 FPGA_CFG_MOSI))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 262 "/MKM interface/FPGA_CFG_MOSI1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 37.15 -64.56067 180)
- (path /57D8556F/58023EE9)
- (attr smd)
- (fp_text reference R84 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 93 FPGA_CFG_MISO))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 263 "/MKM interface/FPGA_CFG_MISO1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 37.15 -63.05 180)
- (path /57D8556F/58023EE8)
- (attr smd)
- (fp_text reference R85 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 0 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 90 FPGA_CFG_CS_N))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 264 "/MKM interface/FPGA_CFG_CS_N1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 16.7523 -16.24 90)
- (path /57D84CB3/58023FF1)
- (attr smd)
- (fp_text reference R86 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 100 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 140 FT_TXD))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 240 "/User USB UART/FT_TXD1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 15.495 -16.24 90)
- (path /57D84CB3/58023FF0)
- (attr smd)
- (fp_text reference R87 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 100 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 139 FT_RXD))
- (pad 2 smd rect (at -0.5 0 270) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 239 "/User USB UART/FT_RXD1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 92.6084 -15.1318)
- (path /57D84E30/58023FBB)
- (attr smd)
- (fp_text reference R88 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 100 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 133 FT_MGMT_TXD))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 242 "/MGMT USB UART/FT_MGMT_TXD1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 92.6084 -16.605)
- (path /57D84E30/58023FBA)
- (attr smd)
- (fp_text reference R89 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 100 (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 132 FT_MGMT_RXD))
- (pad 2 smd rect (at -0.5 0 180) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 241 "/MGMT USB UART/FT_MGMT_RXD1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 92.6084 -13.6332 180)
- (path /57D84E30/58023FB7)
- (attr smd)
- (fp_text reference R90 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 133 FT_MGMT_TXD))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 18.0096 -16.24 270)
- (path /57D84CB3/58023FED)
- (attr smd)
- (fp_text reference R91 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 10k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 210 VCCO_3V3))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 140 FT_TXD))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 47 -7.5 270)
- (path /57D84936/58024083)
- (attr smd)
- (fp_text reference R92 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 170 "Net-(LED1-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 10 ARM_LED2))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 41 -7.5 270)
- (path /57D84936/58024084)
- (attr smd)
- (fp_text reference R93 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 172 "Net-(LED3-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 9 ARM_LED1))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 43 -7.5 270)
- (path /57D84936/58024081)
- (attr smd)
- (fp_text reference R94 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 171 "Net-(LED2-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 12 ARM_LED4))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 30 -7.5 270)
- (path /57D84FAD/58023F97)
- (attr smd)
- (fp_text reference R95 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 174 "Net-(LED9-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 605 ICE40_LED2))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 24 -7.5 270)
- (path /57D84FAD/58023F98)
- (attr smd)
- (fp_text reference R96 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 176 "Net-(LED11-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 606 ICE40_LED1))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
- )
-
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 26 -7.5 270)
- (path /57D84FAD/58023F95)
- (attr smd)
- (fp_text reference R97 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 175 "Net-(LED10-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 607 ICE40_LED4))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
- )
- (model wrlshp/537E0B02-A9B3.wrl
+ (model ${KISYS3DMOD}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x08_P2.54mm_Vertical.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 79 -7 270)
- (path /57D854CB/58023EF7)
+ (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F27F053)
+ (at 91.5 -35 180)
+ (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+ (tags resistor)
+ (path /57D8509E/5F0C809C)
(attr smd)
- (fp_text reference R98 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text reference R25 (at 3.246 1.484) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text value 100 (at 0 1.65) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 181 "Net-(LED16-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 117 FPGA_GPIO_LED_2))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.08)))
)
- (model wrlshp/537E0B02-A9B3.wrl
+ (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+ (net 577 ARM_SPI3_MISO))
+ (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+ (net 583 "/Master Key Memory/ICE40_SPI_SO"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 77 -7 270)
- (path /57D854CB/58023EF8)
+ (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F27F078)
+ (at 91.5 -33 180)
+ (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+ (tags resistor)
+ (path /57D8509E/5F0CAE7D)
(attr smd)
- (fp_text reference R99 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text reference R28 (at 3.246 1.984) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text value 100 (at 0 1.65) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 179 "Net-(LED14-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 118 FPGA_GPIO_LED_3))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.08)))
)
- (model wrlshp/537E0B02-A9B3.wrl
+ (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+ (net 576 ARM_SPI3_MOSI))
+ (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+ (net 580 "/Master Key Memory/ICE40_SPI_SI"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 75 -7 270)
- (path /57D854CB/58023EF5)
+ (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F27F089)
+ (at 91.5 -29 180)
+ (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+ (tags resistor)
+ (path /57D8509E/5F0CB078)
(attr smd)
- (fp_text reference R100 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text reference R29 (at 3.246 4.484) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 330 (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text value 100 (at 0 1.65) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 182 "Net-(LED17-Pad1)"))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers B.Cu B.Paste B.Mask)
- (net 115 FPGA_GPIO_LED_0))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.08)))
)
- (model wrlshp/537E0B02-A9B3.wrl
+ (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+ (net 578 ARM_SPI3_SCK))
+ (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+ (net 582 "/Master Key Memory/ICE40_SPI_SCK"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 59.4 -62.4 270)
- (path /57D85134/58023F6A)
+ (module Resistor_SMD:R_0805_2012Metric (layer F.Cu) (tedit 5B36C52B) (tstamp 5F27F09A)
+ (at 91.5 -31 180)
+ (descr "Resistor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator")
+ (tags resistor)
+ (path /57D8509E/5F0CB134)
(attr smd)
- (fp_text reference R35 (at 0 0 90) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text reference R30 (at 3.246 0.984) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 1k (at 0 0 90) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
+ (fp_text value 100 (at 0 1.65) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (pad 1 smd rect (at 0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 2 smd rect (at -0.5 0 90) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 253 "/Config interface/FPGA_M2"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (fp_line (start -1 0.6) (end -1 -0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start -1 -0.6) (end 1 -0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 -0.6) (end 1 0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start 1 0.6) (end -1 0.6) (layer F.Fab) (width 0.1))
+ (fp_line (start -0.258578 -0.71) (end 0.258578 -0.71) (layer F.SilkS) (width 0.12))
+ (fp_line (start -0.258578 0.71) (end 0.258578 0.71) (layer F.SilkS) (width 0.12))
+ (fp_line (start -1.68 0.95) (end -1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start -1.68 -0.95) (end 1.68 -0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 -0.95) (end 1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_line (start 1.68 0.95) (end -1.68 0.95) (layer F.CrtYd) (width 0.05))
+ (fp_text user %R (at 0 0) (layer F.Fab)
+ (effects (font (size 0.5 0.5) (thickness 0.08)))
)
- (model wrlshp/537E0B02-A9B3.wrl
+ (pad 2 smd roundrect (at 0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+ (net 579 ARM_SPI3_CS_N))
+ (pad 1 smd roundrect (at -0.9375 0 180) (size 0.975 1.4) (layers F.Cu F.Paste F.Mask) (roundrect_rratio 0.25)
+ (net 581 "/Master Key Memory/ICE40_SPI_SS"))
+ (model ${KISYS3DMOD}/Resistor_SMD.3dshapes/R_0805_2012Metric.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 37.091 -59.1757 180)
- (path /57D85134/58023F5F)
- (attr smd)
- (fp_text reference R36 (at 0 0) (layer F.SilkS) hide
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (fp_text value 1k (at 0 0) (layer Cmts.User)
- (effects (font (size 1.524 1.524) (thickness 0.05)))
- )
- (pad 1 smd rect (at 0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 3 GND))
- (pad 2 smd rect (at -0.5 0) (size 0.45 0.6) (layers F.Cu F.Paste F.Mask)
- (net 254 "/Config interface/FPGA_M1"))
- (model "wrlshp/SW3dPS-0402 SMD Resistor.wrl"
- (at (xyz 0 -0 0))
- (scale (xyz 0.39370078740158 0.39370078740158 0.39370078740158))
- (rotate (xyz 270 360 180))
+ (module Symbol:KiCad-Logo2_6mm_SilkScreen (layer F.Cu) (tedit 0) (tstamp 5F6BBCFD)
+ (at 90.17 -85.344)
+ (descr "KiCad Logo")
+ (tags "Logo KiCad")
+ (path /57D8559C/5F6D16C5)
+ (attr virtual)
+ (fp_text reference HS1 (at 0 -5.08) (layer F.SilkS) hide
+ (effects (font (size 1 1) (thickness 0.15)))
)
- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
+ (fp_text value BGA-STD-025 (at 0 6.35) (layer F.Fab) hide
+ (effects (font (size 1 1) (thickness 0.15)))
)
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- (at 32.475 -75.625)
- (path /57D85B19/58023E0E)
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+ (at 88.3158 -85.1408)
+ (path /57D8488D/5802409E)
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)
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- (rotate (xyz 0 0 0))
- )
+ (pad TP smd circle (at 0 0) (size 1.27 1.27) (layers B.Cu B.Paste B.Mask)
+ (net 212 "/Entropy source/RAW_NOISE"))
)
- (module Cryptech_Alpha_Footprints:R_0402 (layer F.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
- (at 34.417 -70.358 180)
- (path /57D85B19/58023E0F)
+ (module Cryptech_Alpha_Footprints:B1,27 (layer B.Cu) (tedit 4289BEAB) (tstamp 539EEDBF)
+ (at 82.1436 -85.1408)
+ (path /57D8488D/5802409D)
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)
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- (net 209 VCC_5V0))
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- (model wrlshp/537E0B02-A9B3.wrl
- (at (xyz 0 0 0))
- (scale (xyz 1 1 1))
- (rotate (xyz 0 0 0))
- )
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+ (net 225 "/Entropy source/AMPLIFIED"))
)
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(gr_line (start 6.33089 48.453) (end 97.291 48.453) (layer Eco2.User) (width 0.381))
(gr_line (start 97.291 48.453) (end 97.291 25.593) (layer Eco2.User) (width 0.381))
@@ -23284,7 +22971,6 @@
(segment (start 65.4562 -5.5) (end 66 -5.5) (width 0.3) (layer F.Cu) (net 3))
(segment (start 61 -7.615) (end 61 -8.475) (width 0.3) (layer F.Cu) (net 3))
(segment (start 59.5 -5.5) (end 60.1258 -5.5) (width 0.3) (layer F.Cu) (net 3))
- (segment (start 60.1258 -5.5) (end 60.265 -5.3608) (width 0.15) (layer F.Cu) (net 3))
(segment (start 85.10415 -7.73325) (end 85.10415 -7.75038) (width 0.2) (layer In2.Cu) (net 3))
(via (at 66 -5.5) (size 0.5) (layers F.Cu B.Cu) (net 3))
(via (at 60.66 14.96359) (size 1) (drill 0.5) (layers F.Cu B.Cu) (net 3))
@@ -31886,7 +31572,7 @@
(segment (start 81.534 -81.28) (end 83.312 -79.502) (width 0.15) (layer In5.Cu) (net 616))
(segment (start 83.312 -79.502) (end 83.312 -76.962) (width 0.15) (layer In5.Cu) (net 616))
- (zone (net 161) (net_name "Net-(C117-Pad1)") (layer B.Cu) (tstamp 5F6CA7C5) (hatch edge 0.508)
+ (zone (net 161) (net_name "Net-(C117-Pad1)") (layer B.Cu) (tstamp 60BE95A9) (hatch edge 0.508)
(priority 47)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -31915,7 +31601,7 @@
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)
)
- (zone (net 202) (net_name PWR_18V) (layer B.Cu) (tstamp 5F6CA7C2) (hatch edge 0.508)
+ (zone (net 202) (net_name PWR_18V) (layer B.Cu) (tstamp 60BE95A6) (hatch edge 0.508)
(priority 65)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -31938,7 +31624,7 @@
)
)
)
- (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 5F6CA7BF) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 60BE95A3) (hatch edge 0.508)
(priority 50)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -31961,7 +31647,7 @@
)
)
)
- (zone (net 166) (net_name "Net-(C208-Pad1)") (layer B.Cu) (tstamp 5F6CA7BC) (hatch edge 0.508)
+ (zone (net 166) (net_name "Net-(C208-Pad1)") (layer B.Cu) (tstamp 60BE95A0) (hatch edge 0.508)
(priority 59)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -31991,7 +31677,7 @@
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- (zone (net 125) (net_name FPGA_VCCAUX_1V8) (layer B.Cu) (tstamp 5F6CA7B9) (hatch edge 0.508)
+ (zone (net 125) (net_name FPGA_VCCAUX_1V8) (layer B.Cu) (tstamp 60BE959D) (hatch edge 0.508)
(priority 58)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -32010,7 +31696,7 @@
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)
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- (zone (net 126) (net_name FPGA_VCCINT_1V0) (layer B.Cu) (tstamp 5F6CA7B6) (hatch edge 0.508)
+ (zone (net 126) (net_name FPGA_VCCINT_1V0) (layer B.Cu) (tstamp 60BE959A) (hatch edge 0.508)
(priority 56)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -32030,7 +31716,7 @@
)
)
)
- (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 5F6CA7B3) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 60BE9597) (hatch edge 0.508)
(priority 50)
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(min_thickness 0.127)
@@ -32061,7 +31747,7 @@
)
)
)
- (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 5F6CA7B0) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 60BE9594) (hatch edge 0.508)
(priority 50)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -32084,7 +31770,7 @@
)
)
)
- (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 5F6CA7AD) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 60BE9591) (hatch edge 0.508)
(priority 50)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -32110,7 +31796,7 @@
)
)
)
- (zone (net 163) (net_name "Net-(C118-Pad1)") (layer B.Cu) (tstamp 5F6CA7AA) (hatch edge 0.508)
+ (zone (net 163) (net_name "Net-(C118-Pad1)") (layer B.Cu) (tstamp 60BE958E) (hatch edge 0.508)
(priority 50)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -32136,7 +31822,7 @@
)
)
)
- (zone (net 209) (net_name VCC_5V0) (layer B.Cu) (tstamp 5F6CA7A7) (hatch edge 0.508)
+ (zone (net 209) (net_name VCC_5V0) (layer B.Cu) (tstamp 60BE958B) (hatch edge 0.508)
(priority 60)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -32204,7 +31890,7 @@
)
)
)
- (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 5F6CA7A4) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 60BE9588) (hatch edge 0.508)
(priority 50)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -32226,7 +31912,7 @@
)
)
)
- (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 5F6CA7A1) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 60BE9585) (hatch edge 0.508)
(priority 50)
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(min_thickness 0.127)
@@ -32472,7 +32158,7 @@
)
)
)
- (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 5F6CA79E) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer B.Cu) (tstamp 60BE9582) (hatch edge 0.508)
(priority 50)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -32523,7 +32209,7 @@
)
)
)
- (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 5F6CA79B) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 60BE957F) (hatch edge 0.508)
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(min_thickness 0.127)
@@ -32544,7 +32230,7 @@
)
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)
- (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 5F6CA798) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 60BE957C) (hatch edge 0.508)
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(min_thickness 0.127)
@@ -32605,7 +32291,7 @@
)
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)
- (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 5F6CA795) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 60BE9579) (hatch edge 0.508)
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(min_thickness 0.127)
@@ -32621,7 +32307,7 @@
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- (zone (net 125) (net_name FPGA_VCCAUX_1V8) (layer F.Cu) (tstamp 5F6CA792) (hatch edge 0.508)
+ (zone (net 125) (net_name FPGA_VCCAUX_1V8) (layer F.Cu) (tstamp 60BE9576) (hatch edge 0.508)
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(min_thickness 0.127)
@@ -32637,7 +32323,7 @@
)
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- (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 5F6CA78F) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer F.Cu) (tstamp 60BE9573) (hatch edge 0.508)
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(min_thickness 0.127)
@@ -32856,7 +32542,7 @@
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- (zone (net 3) (net_name GND) (layer In2.Cu) (tstamp 5F6CA78C) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer In2.Cu) (tstamp 60BE9570) (hatch edge 0.508)
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(min_thickness 0.127)
@@ -38951,7 +38637,7 @@
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- (zone (net 202) (net_name PWR_18V) (layer In2.Cu) (tstamp 5F6CA789) (hatch edge 0.508)
+ (zone (net 202) (net_name PWR_18V) (layer In2.Cu) (tstamp 60BE956D) (hatch edge 0.508)
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@@ -39012,7 +38698,7 @@
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- (zone (net 202) (net_name PWR_18V) (layer In5.Cu) (tstamp 5F6CA786) (hatch edge 0.508)
+ (zone (net 202) (net_name PWR_18V) (layer In5.Cu) (tstamp 60BE956A) (hatch edge 0.508)
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@@ -39073,7 +38759,7 @@
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- (zone (net 3) (net_name GND) (layer In1.Cu) (tstamp 5F6CA783) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer In1.Cu) (tstamp 60BE9567) (hatch edge 0.508)
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@@ -46259,7 +45945,7 @@
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- (zone (net 126) (net_name FPGA_VCCINT_1V0) (layer In4.Cu) (tstamp 5F6CA780) (hatch edge 0.508)
+ (zone (net 126) (net_name FPGA_VCCINT_1V0) (layer In4.Cu) (tstamp 60BE9564) (hatch edge 0.508)
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@@ -49317,7 +49003,7 @@
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- (zone (net 125) (net_name FPGA_VCCAUX_1V8) (layer In4.Cu) (tstamp 5F6CA77D) (hatch edge 0.508)
+ (zone (net 125) (net_name FPGA_VCCAUX_1V8) (layer In4.Cu) (tstamp 60BE9561) (hatch edge 0.508)
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@@ -49809,7 +49495,7 @@
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- (zone (net 3) (net_name GND) (layer In4.Cu) (tstamp 5F6CA77A) (hatch edge 0.508)
+ (zone (net 3) (net_name GND) (layer In4.Cu) (tstamp 60BE955E) (hatch edge 0.508)
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+ (zone (net 202) (net_name PWR_18V) (layer In4.Cu) (tstamp 60BE955B) (hatch edge 0.508)
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- (zone (net 141) (net_name FT_VCC3V3) (layer In4.Cu) (tstamp 5F6CA774) (hatch edge 0.508)
+ (zone (net 141) (net_name FT_VCC3V3) (layer In4.Cu) (tstamp 60BE9558) (hatch edge 0.508)
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@@ -52451,7 +52137,7 @@
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+ (zone (net 3) (net_name GND) (layer In6.Cu) (tstamp 60BE9555) (hatch edge 0.508)
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)
)
- (zone (net 134) (net_name FT_MGMT_VCC3V3) (layer In4.Cu) (tstamp 5F6CA6DB) (hatch edge 0.508)
+ (zone (net 134) (net_name FT_MGMT_VCC3V3) (layer In4.Cu) (tstamp 60BE9540) (hatch edge 0.508)
(priority 100)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)
@@ -77779,7 +76820,7 @@
)
)
)
- (zone (net 571) (net_name "/Master Key Memory/MKM_VCC") (layer In5.Cu) (tstamp 5F6CA6D8) (hatch edge 0.508)
+ (zone (net 571) (net_name "/Master Key Memory/MKM_VCC") (layer In5.Cu) (tstamp 60BE953D) (hatch edge 0.508)
(priority 50)
(connect_pads thru_hole_only (clearance 0.127))
(min_thickness 0.127)