aboutsummaryrefslogtreecommitdiff
path: root/src
AgeCommit message (Collapse)Author
2019-02-12(1) Fixed Makefile. Now we can build sim target, generate bitstream and also ↵Joachim Strömbergson
burn it to the FPGA dev board. (2) Started structuring the RTL source file.
2019-02-11Fixed Makefile to allow building of simulation executable, linting and FPGA ↵Joachim Strömbergson
bitstream. Updated code to work.
2019-02-11Adding initial version of top.Joachim Strömbergson
2019-02-11Adding pinmap for the iCEstick.Joachim Strömbergson