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| author | Joachim StroĢmbergson <joachim@assured.se> | 2019-03-26 14:49:45 +0100 |
|---|---|---|
| committer | Joachim StroĢmbergson <joachim@assured.se> | 2019-03-26 14:49:45 +0100 |
| commit | 6f167e358cd681722eea2b482e2e8d429ea673ad (patch) | |
| tree | 252076418109ded708366d6155664c5c655b61d6 /LICENSE | |
| parent | 47945186ff63e134ff393e4b433d4b7162a4bbda (diff) | |
Completed first RTL for the SPI slave. Simplified the design to simply be two shift registers and a somple FSM that detects clock flanks and SS.
Diffstat (limited to 'LICENSE')
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