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-rw-r--r--src/rtl/novena_fpga.v10
1 files changed, 7 insertions, 3 deletions
diff --git a/src/rtl/novena_fpga.v b/src/rtl/novena_fpga.v
index 56af651..279c5b5 100644
--- a/src/rtl/novena_fpga.v
+++ b/src/rtl/novena_fpga.v
@@ -57,6 +57,7 @@ module novena_fpga(
//input wire F_DX11,
input wire F_DX3,
+ input wire F_DX7,
//input wire F_DX0,
//input wire F_LVDS_CK0_P,
@@ -79,13 +80,16 @@ module novena_fpga(
);
wire clk;
+ wire [7 : 0] test_debug;
+
IBUFGDS clkibufgds(
.I(CLK2_P),
.IB(CLK2_N),
.O(clk)
);
- assign FPGA_LED2 = 1'b1;
+ assign FPGA_LED2 = test_debug[0];
+ // assign FPGA_LED2 = 1'b1;
assign APOPTOSIS = 1'b0;
assign F_DX15 = 1'b1; //+5V P_DUT
@@ -139,8 +143,8 @@ module novena_fpga(
.clk(clk25),
.reset_n(1'b1),
- .noise(F_DX3),
-
+ .noise(F_DX7),
+ .debug(test_debug),
.SCL(I2C3_SCL),
.SDA(SDA_int),
.SDA_pd(SDA_pd)