ucli_commands.key « timing « simulation « clkmgr_dcm « ipcore « src « rtl - test/novena_base - Cryptech Novena FPGA baseline

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path: root/rtl/src/ipcore/clkmgr_dcm/simulation/timing/ucli_commands.key

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call {$vcdpluson}
run 50000ns
call {$vcdplusclose}
quit