diff options
Diffstat (limited to 'rtl/src/verilog/eim_da_phy.v')
-rw-r--r-- | rtl/src/verilog/eim_da_phy.v | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/rtl/src/verilog/eim_da_phy.v b/rtl/src/verilog/eim_da_phy.v new file mode 100644 index 0000000..9fe0c3b --- /dev/null +++ b/rtl/src/verilog/eim_da_phy.v @@ -0,0 +1,47 @@ +`timescale 1ns / 1ps
+
+module eim_da_phy
+ (
+ buf_io,
+ buf_di, buf_ro,
+ buf_t
+ );
+
+ //
+ // Parameters
+ //
+ parameter BUS_WIDTH = 16;
+
+ //
+ // Ports
+ //
+ inout wire [BUS_WIDTH-1:0] buf_io; // connect directly to top-level pins
+ input wire [BUS_WIDTH-1:0] buf_di; // drive input (value driven onto pins)
+ output wire [BUS_WIDTH-1:0] buf_ro; // receiver output (value read from pins)
+ input wire buf_t; // tristate control (driver is disabled during tristate)
+
+ //
+ // IOBUFs
+ //
+ genvar i; + generate for (i=0; i<BUS_WIDTH; i=i+1)
+ begin: eim_da + //
+ IOBUF #
+ (
+ .IOSTANDARD ("LVCMOS33"), + .DRIVE (12), + .SLEW ("FAST") + )
+ IOBUF_inst
+ (
+ .IO (buf_io[i]), + .O (buf_ro[i]), + .I (buf_di[i]), + .T (buf_t) + );
+ // + end + endgenerate
+
+endmodule
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