diff options
Diffstat (limited to 'libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4')
2 files changed, 242 insertions, 3 deletions
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c index 2a207b6..91a6f46 100644 --- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_hal_msp.c @@ -33,10 +33,8 @@ */ /* Includes ------------------------------------------------------------------*/ #include "stm32f4xx_hal.h" +#include "stm-uart.h" -/* USER CODE BEGIN 0 */ - -/* USER CODE END 0 */ /** * Initializes the Global MSP. @@ -121,6 +119,8 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) GPIO_InitTypeDef GPIO_InitStruct; if (huart->Instance == USART1) { + /* This is huart_mgmt (USER_MGMT) */ + /* Peripheral clock enable */ __USART1_CLK_ENABLE(); __GPIOA_CLK_ENABLE(); @@ -138,7 +138,32 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) HAL_NVIC_SetPriority(USART1_IRQn, 0, 1); HAL_NVIC_EnableIRQ(USART1_IRQn); + + /* Peripheral DMA init*/ + hdma_usart_mgmt_rx.Instance = DMA2_Stream2; + hdma_usart_mgmt_rx.Init.Channel = DMA_CHANNEL_4; + hdma_usart_mgmt_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_usart_mgmt_rx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_usart_mgmt_rx.Init.MemInc = DMA_MINC_ENABLE; + hdma_usart_mgmt_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_usart_mgmt_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_usart_mgmt_rx.Init.Mode = DMA_CIRCULAR; + hdma_usart_mgmt_rx.Init.Priority = DMA_PRIORITY_LOW; + hdma_usart_mgmt_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + /* + hdma_usart_mgmt_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL; + hdma_usart_mgmt_rx.Init.MemBurst = DMA_MBURST_SINGLE; + hdma_usart_mgmt_rx.Init.PeriphBurst = DMA_PBURST_SINGLE; + */ + if (HAL_DMA_Init(&hdma_usart_mgmt_rx) != HAL_OK) { + Error_Handler(); + } + + __HAL_LINKDMA(huart, hdmarx, hdma_usart_mgmt_rx); + } else if (huart->Instance == USART2) { + /* This is huart_user (USER UART) */ + /* Peripheral clock enable */ __USART2_CLK_ENABLE(); __GPIOA_CLK_ENABLE(); @@ -156,6 +181,28 @@ void HAL_UART_MspInit(UART_HandleTypeDef* huart) HAL_NVIC_SetPriority(USART2_IRQn, 0, 1); HAL_NVIC_EnableIRQ(USART2_IRQn); + + /* Peripheral DMA init*/ + hdma_usart_user_rx.Instance = DMA1_Stream5; + hdma_usart_user_rx.Init.Channel = DMA_CHANNEL_4; + hdma_usart_user_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_usart_user_rx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_usart_user_rx.Init.MemInc = DMA_MINC_ENABLE; + hdma_usart_user_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_usart_user_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_usart_user_rx.Init.Mode = DMA_CIRCULAR; + hdma_usart_user_rx.Init.Priority = DMA_PRIORITY_LOW; + hdma_usart_user_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + /* + hdma_usart_user_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_HALFFULL; + hdma_usart_user_rx.Init.MemBurst = DMA_MBURST_SINGLE; + hdma_usart_user_rx.Init.PeriphBurst = DMA_PBURST_SINGLE; + */ + if (HAL_DMA_Init(&hdma_usart_user_rx) != HAL_OK) { + Error_Handler(); + } + + __HAL_LINKDMA(huart, hdmarx, hdma_usart_user_rx); } } @@ -172,6 +219,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2 | GPIO_PIN_3); HAL_NVIC_DisableIRQ(USART1_IRQn); + + /* Peripheral DMA DeInit*/ + HAL_DMA_DeInit(huart->hdmarx); } else if (huart->Instance == USART2) { /* Peripheral clock disable */ __USART2_CLK_DISABLE(); @@ -183,6 +233,9 @@ void HAL_UART_MspDeInit(UART_HandleTypeDef* huart) HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9 | GPIO_PIN_10); HAL_NVIC_DisableIRQ(USART2_IRQn); + + /* Peripheral DMA DeInit*/ + HAL_DMA_DeInit(huart->hdmarx); } } diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it.c new file mode 100644 index 0000000..b3de408 --- /dev/null +++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/stm32f4xx_it.c @@ -0,0 +1,186 @@ +/** +****************************************************************************** +* @file GPIO/GPIO_IOToggle/Src/stm32f4xx_it.c +* @author MCD Application Team +* @version V1.0.1 +* @date 26-February-2014 +* @brief Main Interrupt Service Routines. +* This file provides template for all exceptions handler and +* peripherals interrupt service routine. +****************************************************************************** +* @attention +* +* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> +* +* Redistribution and use in source and binary forms, with or without modification, +* are permitted provided that the following conditions are met: +* 1. Redistributions of source code must retain the above copyright notice, +* this list of conditions and the following disclaimer. +* 2. Redistributions in binary form must reproduce the above copyright notice, +* this list of conditions and the following disclaimer in the documentation +* and/or other materials provided with the distribution. +* 3. Neither the name of STMicroelectronics nor the names of its contributors +* may be used to endorse or promote products derived from this software +* without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +*/ + +#include "stm-init.h" +#include "stm-uart.h" + +/******************************************************************************/ +/* Cortex-M4 Processor Exceptions Handlers */ +/******************************************************************************/ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) { ; } +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) { ; } +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) { ; } +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) { ; } +} + + +#if 0 /* already defined in libraries/mbed/rtos/ */ +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +void SVC_Handler(void) +{ +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +void DebugMon_Handler(void) +{ +} + +/** + * @brief This function handles PendSVC exception. + * @param None + * @retval None + */ +void PendSV_Handler(void) +{ +} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{ + HAL_IncTick(); +} +#endif + +/******************************************************************************/ +/* STM32F4xx Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32f4xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles UART interrupt request. + * @param None + * @retval None + * @Note HAL_UART_IRQHandler will call HAL_UART_TxCpltCallback in main.c. + */ +void USART1_IRQHandler(void) +{ + HAL_UART_IRQHandler(&huart_mgmt); +} + +/** + * @brief This function handles UART interrupt request. + * @param None + * @retval None + * @Note HAL_UART_IRQHandler will call HAL_UART_TxCpltCallback in main.c. + */ +void USART2_IRQHandler(void) +{ + HAL_UART_IRQHandler(&huart_user); +} + +/** +* @brief This function handles DMA1 stream5 global interrupt. +*/ +void DMA1_Stream5_IRQHandler(void) +{ + HAL_DMA_IRQHandler(&hdma_usart_user_rx); +} + +/** +* @brief This function handles DMA2 stream2 global interrupt. +*/ +void DMA2_Stream2_IRQHandler(void) +{ + HAL_DMA_IRQHandler(&hdma_usart_mgmt_rx); +} + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |