diff options
| author | Fredrik Thulin <fredrik@thulin.net> | 2016-05-19 14:23:13 +0200 |
|---|---|---|
| committer | Fredrik Thulin <fredrik@thulin.net> | 2016-05-19 14:23:13 +0200 |
| commit | bfcbe2a78f709417c2f41de32a8d6b61842a0abd (patch) | |
| tree | 265a26c833a0c8339ad9c28df3bc8e81ddc7e0ca /stm-fpgacfg.h | |
| parent | 67837a0d3cc661d250ecb2c57c22171f312e073a (diff) | |
Refactor FPGA bitstream upload code.
Move the N25Q128 code to it's own file in order to be able to reuse it
for the keystore memory code.
Diffstat (limited to 'stm-fpgacfg.h')
| -rw-r--r-- | stm-fpgacfg.h | 52 |
1 files changed, 15 insertions, 37 deletions
diff --git a/stm-fpgacfg.h b/stm-fpgacfg.h index fa5c4ef..ad86a89 100644 --- a/stm-fpgacfg.h +++ b/stm-fpgacfg.h @@ -36,47 +36,25 @@ #define __STM32_FPGACFG_H #include "stm32f4xx_hal.h" +#include "spiflash_n25q128.h" -#define N25Q128_SPI_HANDLE (&hspi_fpgacfg) +#define PROM_FPGA_DIS_Pin GPIO_PIN_14 +#define PROM_FPGA_DIS_GPIO_Port GPIOI +#define PROM_ARM_ENA_Pin GPIO_PIN_6 +#define PROM_ARM_ENA_GPIO_Port GPIOF +#define PROM_CS_N_Pin GPIO_PIN_12 +#define PROM_CS_N_GPIO_Port GPIOB -#define N25Q128_COMMAND_READ_ID 0x9E -#define N25Q128_COMMAND_READ_PAGE 0x03 -#define N25Q128_COMMAND_READ_STATUS 0x05 -#define N25Q128_COMMAND_WRITE_ENABLE 0x06 -#define N25Q128_COMMAND_ERASE_SECTOR 0xD8 -#define N25Q128_COMMAND_PAGE_PROGRAM 0x02 -#define N25Q128_PAGE_SIZE 0x100 // 256 -#define N25Q128_NUM_PAGES 0x10000 // 65536 +enum fpgacfg_access_ctrl { + ALLOW_NONE, + ALLOW_FPGA, + ALLOW_ARM, +}; -#define N25Q128_SECTOR_SIZE 0x10000 // 65536 -#define N25Q128_NUM_SECTORS 0x100 // 256 - -#define N25Q128_SPI_TIMEOUT 1000 - -#define N25Q128_ID_MANUFACTURER 0x20 -#define N25Q128_ID_DEVICE_TYPE 0xBA -#define N25Q128_ID_DEVICE_CAPACITY 0x18 - -#define PROM_FPGA_DIS_Pin GPIO_PIN_14 -#define PROM_FPGA_DIS_GPIO_Port GPIOI -#define PROM_ARM_ENA_Pin GPIO_PIN_6 -#define PROM_ARM_ENA_GPIO_Port GPIOF -#define PROM_CS_N_Pin GPIO_PIN_12 -#define PROM_CS_N_GPIO_Port GPIOB - - -#define _n25q128_select() HAL_GPIO_WritePin(PROM_CS_N_GPIO_Port, PROM_CS_N_Pin, GPIO_PIN_RESET); -#define _n25q128_deselect() HAL_GPIO_WritePin(PROM_CS_N_GPIO_Port, PROM_CS_N_Pin, GPIO_PIN_SET); - -extern int n25q128_check_id(void); -extern int n25q128_get_wip_flag(void); -extern int n25q128_read_page(uint32_t page_offset, uint8_t *page_buffer); -extern int n25q128_write_page(uint32_t page_offset, uint8_t *page_buffer); -extern int n25q128_erase_sector(uint32_t sector_offset); - -extern void fpgacfg_give_access_to_stm32(void); -extern void fpgacfg_give_access_to_fpga(void); +extern int fpgacfg_check_id(); +extern int fpgacfg_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len); +extern void fpgacfg_access_control(enum fpgacfg_access_ctrl access); extern SPI_HandleTypeDef hspi_fpgacfg; |