Refactor FPGA bitstream upload code.

Move the N25Q128 code to it's own file in order to be able to reuse it
for the keystore memory code.

1 files changed, 21 insertions, 246 deletions

diff --git a/stm-fpgacfg.c b/stm-fpgacfg.c
index 0d255e5..f8ff6fa 100644
--- a/stm-fpgacfg.c
+++ b/stm-fpgacfg.c
@@ -38,259 +38,34 @@
 
 SPI_HandleTypeDef hspi_fpgacfg;
 
-int _n25q128_get_wel_flag(void);
+struct spiflash_ctx fpgacfg_ctx = {&hspi_fpgacfg, PROM_CS_N_GPIO_Port, PROM_CS_N_Pin};
 
-
-int n25q128_check_id()
+int fpgacfg_check_id()
 {
-    // tx, rx buffers
-    uint8_t spi_tx[4];
-    uint8_t spi_rx[4];
-
-    // result
-    HAL_StatusTypeDef ok;
-
-    // send READ ID command
-    spi_tx[0] = N25Q128_COMMAND_READ_ID;
-
-    // select, send command & read response, deselect
-    _n25q128_select();
-    ok = HAL_SPI_TransmitReceive(N25Q128_SPI_HANDLE, spi_tx, spi_rx, 4, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-    _n25q128_deselect();
-
-    // check
-    if (ok != HAL_OK) return 0;
-
-    // parse response (note, that the very first byte was received during the
-    // transfer of the command byte, so it contains garbage and should
-    // be ignored here)
-    if (spi_rx[1] != N25Q128_ID_MANUFACTURER) return 0;
-    if (spi_rx[2] != N25Q128_ID_DEVICE_TYPE) return 0;
-    if (spi_rx[3] != N25Q128_ID_DEVICE_CAPACITY) return 0;
-
-    // done
-    return 1;
+    return n25q128_check_id(&fpgacfg_ctx);
 }
 
-
-int n25q128_read_page(uint32_t page_offset, uint8_t *page_buffer)
+int fpgacfg_write_data(uint32_t offset, const uint8_t *buf, const uint32_t len)
 {
-    // tx buffer
-    uint8_t spi_tx[4];
-
-    // result
-    HAL_StatusTypeDef ok;
-
-    // check offset
-    if (page_offset >= N25Q128_NUM_PAGES) return 0;
-
-    // calculate byte address
-    page_offset *= N25Q128_PAGE_SIZE;
-
-    // prepare READ command
-    spi_tx[0] = N25Q128_COMMAND_READ_PAGE;
-    spi_tx[1] = (uint8_t)(page_offset >> 16);
-    spi_tx[2] = (uint8_t)(page_offset >>  8);
-    spi_tx[3] = (uint8_t)(page_offset >>  0);
-
-    // activate, send command
-    _n25q128_select();
-    ok = HAL_SPI_Transmit(N25Q128_SPI_HANDLE, spi_tx, 4, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-
-    // check
-    if (ok != HAL_OK) {
-	_n25q128_deselect();
-	return 0;
-    }
-
-    // read response, deselect
-    ok = HAL_SPI_Receive(N25Q128_SPI_HANDLE, page_buffer, N25Q128_PAGE_SIZE, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-    _n25q128_deselect();
-
-    // check
-    if (ok != HAL_OK) return 0;
-
-    // done
-    return 1;
+    return n25q128_write_data(&fpgacfg_ctx, offset, buf, len);
 }
 
-
-int n25q128_write_page(uint32_t page_offset, uint8_t *page_buffer)
+void fpgacfg_access_control(enum fpgacfg_access_ctrl access)
 {
-    // tx buffer
-    uint8_t spi_tx[4];
-
-    // result
-    HAL_StatusTypeDef ok;
-
-    // check offset
-    if (page_offset >= N25Q128_NUM_PAGES) return 0;
-
-    // enable writing
-    spi_tx[0] = N25Q128_COMMAND_WRITE_ENABLE;
-
-    // activate, send command, deselect
-    _n25q128_select();
-    ok = HAL_SPI_Transmit(N25Q128_SPI_HANDLE, spi_tx, 1, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-    _n25q128_deselect();
-
-    // check
-    if (ok != HAL_OK) return 0;
-
-    // make sure, that write enable did the job
-    int wel = _n25q128_get_wel_flag();
-    if (wel != 1) return 0;
-
-    // calculate byte address
-    page_offset *= N25Q128_PAGE_SIZE;
-
-    // prepare PROGRAM PAGE command
-    spi_tx[0] = N25Q128_COMMAND_PAGE_PROGRAM;
-    spi_tx[1] = (uint8_t)(page_offset >> 16);
-    spi_tx[2] = (uint8_t)(page_offset >>  8);
-    spi_tx[3] = (uint8_t)(page_offset >>  0);
-
-    // activate, send command
-    _n25q128_select();
-    ok = HAL_SPI_Transmit(N25Q128_SPI_HANDLE, spi_tx, 4, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-
-    // check
-    if (ok != HAL_OK) {
-	_n25q128_deselect();
-	return 0;
+    if (access == ALLOW_ARM) {
+	// fpga disable = 1
+	HAL_GPIO_WritePin(PROM_FPGA_DIS_GPIO_Port, PROM_FPGA_DIS_Pin, GPIO_PIN_SET);
+	// arm enable = 0
+	HAL_GPIO_WritePin(GPIOF, PROM_ARM_ENA_Pin, GPIO_PIN_RESET);
+    } else if (access == ALLOW_FPGA) {
+	// fpga disable = 0
+	HAL_GPIO_WritePin(PROM_FPGA_DIS_GPIO_Port, PROM_FPGA_DIS_Pin, GPIO_PIN_RESET);
+	// arm enable = 1
+	HAL_GPIO_WritePin(GPIOF, PROM_ARM_ENA_Pin, GPIO_PIN_SET);
+    } else {
+	// fpga disable = 1
+	HAL_GPIO_WritePin(PROM_FPGA_DIS_GPIO_Port, PROM_FPGA_DIS_Pin, GPIO_PIN_SET);
+	// arm enable = 1
+	HAL_GPIO_WritePin(GPIOF, PROM_ARM_ENA_Pin, GPIO_PIN_SET);
     }
-
-    // send data, deselect
-    ok = HAL_SPI_Transmit(N25Q128_SPI_HANDLE, page_buffer, N25Q128_PAGE_SIZE, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-    _n25q128_deselect();
-
-    // check
-    if (ok != HAL_OK) return 0;
-
-    // done
-    return 1;
-}
-
-
-int n25q128_get_wip_flag(void)
-{
-    // tx, rx buffers
-    uint8_t spi_tx[2];
-    uint8_t spi_rx[2];
-
-    // result
-    HAL_StatusTypeDef ok;
-
-    // send READ STATUS command
-    spi_tx[0] = N25Q128_COMMAND_READ_STATUS;
-
-    // send command, read response, deselect
-    _n25q128_select();
-    ok = HAL_SPI_TransmitReceive(N25Q128_SPI_HANDLE, spi_tx, spi_rx, 2, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-    _n25q128_deselect();
-
-    // check
-    if (ok != HAL_OK) return -1;
-
-    // done
-    return (spi_rx[1] & 1);
-}
-
-
-int n25q128_erase_sector(uint32_t sector_offset)
-{
-    // tx buffer
-    uint8_t spi_tx[4];
-
-    // result
-    HAL_StatusTypeDef ok;
-
-    // check offset
-    if (sector_offset >= N25Q128_NUM_SECTORS) return 0;
-
-    // enable writing
-    spi_tx[0] = N25Q128_COMMAND_WRITE_ENABLE;
-
-    // select, send command, deselect
-    _n25q128_select();
-    ok = HAL_SPI_Transmit(N25Q128_SPI_HANDLE, spi_tx, 1, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-    _n25q128_deselect();
-
-    // check
-    if (ok != HAL_OK) return 0;
-
-    // make sure, that write enable did the job
-    int wel = _n25q128_get_wel_flag();
-    if (wel != 1) return 0;
-
-    // calculate byte address
-    sector_offset *= N25Q128_SECTOR_SIZE;
-
-    // send ERASE SUBSECTOR command
-    spi_tx[0] = N25Q128_COMMAND_ERASE_SECTOR;
-    spi_tx[1] = (uint8_t)(sector_offset >> 16);
-    spi_tx[2] = (uint8_t)(sector_offset >>  8);
-    spi_tx[3] = (uint8_t)(sector_offset >>  0);
-
-    // activate, send command, deselect
-    _n25q128_select();
-    ok = HAL_SPI_Transmit(N25Q128_SPI_HANDLE, spi_tx, 4, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-    _n25q128_deselect();
-
-    // check
-    if (ok != HAL_OK) return 0;
-
-    // done
-    return 1;
-}
-
-
-int _n25q128_get_wel_flag(void)
-{
-    // tx, rx buffers
-    uint8_t spi_tx[2];
-    uint8_t spi_rx[2];
-
-    // result
-    HAL_StatusTypeDef ok;
-
-    // send READ STATUS command
-    spi_tx[0] = N25Q128_COMMAND_READ_STATUS;
-
-    // send command, read response, deselect
-    _n25q128_select();
-    ok = HAL_SPI_TransmitReceive(N25Q128_SPI_HANDLE, spi_tx, spi_rx, 2, N25Q128_SPI_TIMEOUT);
-    HAL_Delay(1);
-    _n25q128_deselect();
-
-    // check
-    if (ok != HAL_OK) return -1;
-
-    // done
-    return ((spi_rx[1] >> 1) & 1);
-}
-
-void fpgacfg_give_access_to_stm32()
-{
-    // fpga disable = 1
-    HAL_GPIO_WritePin(GPIOI, GPIO_PIN_14, GPIO_PIN_SET);
-    // arm enable = 0
-    HAL_GPIO_WritePin(GPIOF, GPIO_PIN_6, GPIO_PIN_RESET);
-}
-
-void fpgacfg_give_access_to_fpga()
-{
-    // fpga disable = 0
-    HAL_GPIO_WritePin(GPIOI, GPIO_PIN_14, GPIO_PIN_RESET);
-    // arm enable = 1
-    HAL_GPIO_WritePin(GPIOF, GPIO_PIN_6, GPIO_PIN_SET);
 }