Merge branch 'init_cleanup' into no-rtos

Clean up Makefiles and initialization code.

1 files changed, 31 insertions, 4 deletions

diff --git a/stm-fpgacfg.c b/stm-fpgacfg.c
index 10abc57..b2f09d0 100644
--- a/stm-fpgacfg.c
+++ b/stm-fpgacfg.c
@@ -33,15 +33,42 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include "stm32f4xx_hal.h"
 #include "stm-fpgacfg.h"
 #include "stm-init.h"
 
-SPI_HandleTypeDef hspi_fpgacfg;
+static SPI_HandleTypeDef hspi_fpgacfg;
 
-struct spiflash_ctx fpgacfg_ctx = {&hspi_fpgacfg, PROM_CS_N_GPIO_Port, PROM_CS_N_Pin};
+static struct spiflash_ctx fpgacfg_ctx = {&hspi_fpgacfg, PROM_CS_N_GPIO_Port, PROM_CS_N_Pin};
 
-int fpgacfg_check_id()
+void fpgacfg_init(void)
+{
+    /* Give the FPGA access to it's bitstream ASAP (maybe this should actually
+     * be done in the application, before calling stm_init()).
+     */
+    fpgacfg_access_control(ALLOW_FPGA);
+
+    /* Set up GPIOs to manage access to the FPGA config memory.
+     * FPGACFG_GPIO_INIT is defined in stm-fpgacfg.h.
+     */
+    FPGACFG_GPIO_INIT();
+
+    /* SPI2 (FPGA config memory) init function */
+    hspi_fpgacfg.Instance = SPI2;
+    hspi_fpgacfg.Init.Mode = SPI_MODE_MASTER;
+    hspi_fpgacfg.Init.Direction = SPI_DIRECTION_2LINES;
+    hspi_fpgacfg.Init.DataSize = SPI_DATASIZE_8BIT;
+    hspi_fpgacfg.Init.CLKPolarity = SPI_POLARITY_LOW;
+    hspi_fpgacfg.Init.CLKPhase = SPI_PHASE_1EDGE;
+    hspi_fpgacfg.Init.NSS = SPI_NSS_SOFT;
+    hspi_fpgacfg.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
+    hspi_fpgacfg.Init.FirstBit = SPI_FIRSTBIT_MSB;
+    hspi_fpgacfg.Init.TIMode = SPI_TIMODE_DISABLE;
+    hspi_fpgacfg.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
+    hspi_fpgacfg.Init.CRCPolynomial = 10;
+    HAL_SPI_Init(&hspi_fpgacfg);
+}
+
+int fpgacfg_check_id(void)
 {
     return n25q128_check_id(&fpgacfg_ctx);
 }