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2018-11-23Added ability observe mkmif state. Realized that the write operation handler ↵Joachim Strömbergson
was under read operation handling. Fixed this and now status write works. We can observe 0xdeadbeef in the memory after status write operation.
2018-11-23Updated display of states. We can now observe correct init of the memory.Joachim Strömbergson
2018-11-23Adding task to dump parts of the contents of the serial memory.Joachim Strömbergson
2018-11-23Added observation of mem internal control states.Joachim Strömbergson
2018-11-23Enabled spi observation and can see that SPI interface is alive when pulling ↵Joachim Strömbergson
init.
2018-11-23Adding test case for mem init. Removing auto-load test case since the dut ↵Joachim Strömbergson
does not support auto load. Updating the write status test case to use wait_ready() for dut status.
2018-11-22Adding outputs to observe dut API. Adding support in Makefile for using the ↵Joachim Strömbergson
vendor supplied memory model.
2018-11-13Adding README that describes the purpose of the dir and how to get the ↵Joachim Strömbergson
vendor specific memory model we need here.
2018-11-06Fixed incorrect address used for the key. Added testcase to verify reading ↵Joachim Strömbergson
of status word.
2018-11-06Trigger read operation when we should read.Joachim Strömbergson
2018-11-06Adding test case to observe auto-load of key and status after reset.Joachim Strömbergson
2018-10-30Integrated the DUT into the testbench and update Makefile to build the sim ↵Joachim Strömbergson
target-
2018-10-23Hardened the keywrap API to not allow reads or writes when the core is busy.Joachim Strömbergson
2018-09-28Adding initial version of testbench for the mkmif wrapper.Joachim Strömbergson
2018-09-28Completed syntax debug after integration of new mkmif_core wrapper.Joachim Strömbergson
2018-09-28Integrated new mkmif_core wrapper.Joachim Strömbergson
2018-09-28Some whitespace cleanup.Joachim Strömbergson
2018-09-28Completed the functionality that should be in the wrapper. Now its just ↵Joachim Strömbergson
debugging...
2018-09-28Got all states needed. Added hold registers for address and data to be written.Joachim Strömbergson
2018-09-28Adding initial version of mkmif wrapper used by keywrap_core to hide ↵Joachim Strömbergson
protocol complexity.
2018-09-25Added logic to perform status word read operation from the mkm. Adding ↵Joachim Strömbergson
interfaces and registers to be able to pass mkm status to host. Updated dut instantiation in core testbench to.
2018-09-25Updated the keywrap API to support access to MKM status. Updated ↵Joachim Strömbergson
keywrap_core to support control of MKM access operations.
2018-09-25Increased control state space to make room for read and write operations.Joachim Strömbergson
2018-09-25Integrate the mkmif_core instead of the mkmif wrapper.Joachim Strömbergson
2018-09-21Adding more infrastructure needed for the integrated mkm.Joachim Strömbergson
2018-09-18Adding more functionality needed for the mkm integration.Joachim Strömbergson
2018-09-18Increasing control state reg to support more states. Adding first states for ↵Joachim Strömbergson
read and write key handling.
2018-09-18Adding API control bits to read and write key.Joachim Strömbergson
2018-09-18Moved compile time debug access control of key to the API. Added correct ↵Joachim Strömbergson
code to mux key.
2018-09-18Moved the mkmif instance into the core itself. Added API to read the key if ↵Joachim Strömbergson
DEBUG is set.
2018-09-14Adding instatiation of the mkmif in the keywrap top level wrapper. Updated ↵Joachim Strömbergson
testbench anf Makefile to build with instantiated mkmif. The mkmif is not yet used by the keywrap.
2018-09-11Adding a huge, self testing test case.Joachim Strömbergson
2018-09-07Updated testbench to use the new API. Verified that the new API works. No ↵Joachim Strömbergson
more banks.
2018-09-07Removed r_bank from dump since it no longer exists.Joachim Strömbergson
2018-09-07Test write to all positions in the mem.Joachim Strömbergson
2018-09-04Updated rtl and tb to support parameterized memory size.Joachim Strömbergson
2018-09-04Updated testbench to handle parameterized core.Joachim Strömbergson
2018-09-04Updated testbench to work with the parameterized memory.Joachim Strömbergson
2018-08-24We probably want to be able to read data too.Joachim Strömbergson
2018-08-24Killed the bank switching.Joachim Strömbergson
2018-08-24Performed Verilog parameter magic to make the design scaleable in terms of ↵Joachim Strömbergson
capacity. Does not yet work, but at least the linter is fairly happy.
2018-08-23Adding top level defines for setting size and address bits.Joachim Strömbergson
2018-08-16Adding delay cycle to API regs to match the latency for accessing the ↵Joachim Strömbergson
blockRAM. Added test case that checks access to the API regs.
2018-08-15Fix some misleading messages, and enable all tests.Paul Selkirk
2018-07-24Added explicit width specification for constant to silence truncation warning.Joachim Strömbergson
2018-07-06(1) Updated version to reflect status. (2) Minor fix after running sim in ↵Joachim Strömbergson
ModelSim.
2018-07-06Adding test case for 4096 bit unwrap. Testcase passed! We have unwrap.Joachim Strömbergson
2018-07-06Debugged key unwrap. First testcase for unwerap passed. Added some more ↵Joachim Strömbergson
debug outputs.
2018-07-06(1) Fixed dump of core_addr in testbench to actually show the core_addr. ↵Joachim Strömbergson
Fixed boundaries for the block counter. Now we don't read mem out of bounds.
2018-07-05Adding wait state to allow access from memory to complete. Should be ↵Joachim Strömbergson
possible to optimize.