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2018-12-20Cleaned up and made auto zeroise test case 1 self-testing:Joachim Strömbergson
2018-12-14Splitted the auto-zeroise test case into three separate tests.Joachim Strömbergson
2018-12-13Fixed some bugs in auto-zeroise functionality. Now it really zeroises key ↵Joachim Strömbergson
automatically. It seems to work, but needs a bit more testing.
2018-12-11Zeroisation of wrapper key registers. Adding reset of key_loaded register.Joachim Strömbergson
2018-12-11Adding test case for auto_zeroise. Can see that a loaded key gets wiped ↵Joachim Strömbergson
after timeout. Status bits looks fishy though.
2018-12-09Adding support for SW to keep loaded key alive by reading status. Adding ↵Joachim Strömbergson
support for SW to trigger zeroisation of a loaded key.
2018-12-07Adding a more sane default timeout value.Joachim Strömbergson
2018-12-07Adding untested code to implement timer controlled automatic zeroisation of ↵Joachim Strömbergson
key loaded into the aes core.
2018-12-07Adding API support for key loaded status and key timeout control. Added ↵Joachim Strömbergson
ports in the core to support key status and timeout. Updated core testbench to match the new interface.
2018-09-11Adding a huge, self testing test case.Joachim Strömbergson
2018-09-07Updated testbench to use the new API. Verified that the new API works. No ↵Joachim Strömbergson
more banks.
2018-09-07Removed r_bank from dump since it no longer exists.Joachim Strömbergson
2018-09-07Test write to all positions in the mem.Joachim Strömbergson
2018-09-04Updated rtl and tb to support parameterized memory size.Joachim Strömbergson
2018-09-04Updated testbench to handle parameterized core.Joachim Strömbergson
2018-09-04Updated testbench to work with the parameterized memory.Joachim Strömbergson
2018-08-24We probably want to be able to read data too.Joachim Strömbergson
2018-08-24Killed the bank switching.Joachim Strömbergson
2018-08-24Performed Verilog parameter magic to make the design scaleable in terms of ↵Joachim Strömbergson
capacity. Does not yet work, but at least the linter is fairly happy.
2018-08-23Adding top level defines for setting size and address bits.Joachim Strömbergson
2018-08-16Adding delay cycle to API regs to match the latency for accessing the ↵Joachim Strömbergson
blockRAM. Added test case that checks access to the API regs.
2018-08-16Updated the info about max object size supports and number of banks.Joachim Strömbergson
2018-08-15Fix some misleading messages, and enable all tests.Paul Selkirk
2018-07-24Added explicit width specification for constant to silence truncation warning.Joachim Strömbergson
2018-07-06Updated README with status and information about the implementation.Joachim Strömbergson
2018-07-06(1) Updated version to reflect status. (2) Minor fix after running sim in ↵Joachim Strömbergson
ModelSim.
2018-07-06Adding test case for 4096 bit unwrap. Testcase passed! We have unwrap.Joachim Strömbergson
2018-07-06Debugged key unwrap. First testcase for unwerap passed. Added some more ↵Joachim Strömbergson
debug outputs.
2018-07-06(1) Fixed dump of core_addr in testbench to actually show the core_addr. ↵Joachim Strömbergson
Fixed boundaries for the block counter. Now we don't read mem out of bounds.
2018-07-05Adding wait state to allow access from memory to complete. Should be ↵Joachim Strömbergson
possible to optimize.
2018-07-05Fixing block counter init bug. Enabling detailed debugging. Fixing minor nits.Joachim Strömbergson
2018-07-05Fixed minor details in unwrap test case. Enabled unwrap test case.Joachim Strömbergson
2018-07-05Updated keywrap logic to support unwrap. Split state to handle next start in ↵Joachim Strömbergson
both wrap and unwrap cases.
2018-07-05Adding state and counter functionality to support unwrap. Changed name of ↵Joachim Strömbergson
define to something more comprehensible.
2018-07-05Adding unwrap test case.Joachim Strömbergson
2018-07-05Adding wrap test case with 4096 bit plaintext from NIST. Test result matches ↵Joachim Strömbergson
model.
2018-07-05Removed a few states and a few cycles.Joachim Strömbergson
2018-07-05We use the aes_speed core instead.Joachim Strömbergson
2018-07-05Adding tool to generate write commands.Joachim Strömbergson
2018-07-05Adding testcase for wrapping 4096 bit data.Joachim Strömbergson
2018-07-05We haz keywrap! Time to add more testcases and make them self testing. Oh ↵Joachim Strömbergson
and implement unwrap.
2018-07-05Debugged keywrap processing including A update. All AES operations works ↵Joachim Strömbergson
correctly. Now we just need to stop processing whe we should.
2018-07-05Fixed memory word order. Fixed a number of bugs. First block encrypted ↵Joachim Strömbergson
correctly. A state is wrong and memory is read too far.
2018-07-05Removed the streaming interface in favor of a normal address based ↵Joachim Strömbergson
interface. A bit more kludgy, esp since we need to use bank switching to be able to provide enough address space. But this removes a possible problem of the streaming address counter running wild.
2018-07-03Adding more dump outputs. wrap does not yet work, but one can see when ↵Joachim Strömbergson
things go bad and where the isssues are.
2018-07-03Good news: The core peformcs all AES operations and stops after correct ↵Joachim Strömbergson
number of operations. Bad news: All values are wrong.
2018-07-03Debugged a lot of minor errors and added a lot of debug functions. Things ↵Joachim Strömbergson
are starting to work. As in AES is actually initialized and used.
2018-07-03Add support to dump contents of memory to check that data has been written ↵Joachim Strömbergson
correctly.
2018-07-03Added test case with vectors from NIST KWP AE. Test fails. But at least it ↵Joachim Strömbergson
doesn't hang. Now for some bug hunting.
2018-07-03Adding a lot of verbose output to get the internal values we need.Joachim Strömbergson
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