Cleaned up and made auto zeroise test case 1 self-testing:

1 files changed, 36 insertions, 30 deletions

diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v
index ba23f4d..75e01e3 100644
--- a/src/tb/tb_keywrap.v
+++ b/src/tb/tb_keywrap.v
@@ -39,10 +39,10 @@
 
 module tb_keywrap();
 
-  parameter DEBUG        = 1;
+  parameter DEBUG        = 0;
   parameter DUMP_TOP     = 0;
   parameter DUMP_CORE    = 0;
-  parameter DUMP_TIMEOUT = 1;
+  parameter DUMP_TIMEOUT = 0;
 
   parameter CLK_HALF_PERIOD = 1;
   parameter CLK_PERIOD      = 2 * CLK_HALF_PERIOD;
@@ -1166,16 +1166,10 @@ module tb_keywrap();
   //----------------------------------------------------------------
   // test_zeroise1
   // Test the auto_zeroise functionality. We test that:
-  //   1. We can init a key and have it auto zeroise.
-  //   2. We can init a key and keep it alive.
-  //   3. We can init a key and the force zeroisation.
+  //   1. We can init a key and have it be auto zeroised.
   //----------------------------------------------------------------
   task test_zeroise1;
     begin : test_zeroise1
-      integer i;
-      integer err;
-
-      err = 0;
 
       $display("** TC test_zeroise1 START.");
       $display("** Test of auto zeroise.");
@@ -1196,19 +1190,21 @@ module tb_keywrap();
       read_word(ADDR_STATUS);
       $display("Status register: 0x%032b", read_data);
 
-      // Set the key timeout to 256 cycles.
+      // Set the key timeout to 0xdeadbeef cycles.
       write_word(ADDR_TIMEOUT, 32'hdeadbeef);
       read_word(ADDR_TIMEOUT);
       if (read_data != 32'hdeadbeef)
-        $display("Error. Timout value = 0x%04x, expected 0xdeadbeef", read_data);
+        begin
+          error_ctr = error_ctr + 1;
+          $display("Error. Timeout value = 0x%04x, expected 0xdeadbeef", read_data);
+        end
 
       // Display contents in key expansion register 2.
-      $display("Contents of the key_mem[2] before init: 0x%016x",
+      $display("Contents in key_mem[2] before init: 0x%016x",
                dut.core.aes.keymem.key_mem[2]);
 
       // Initialize the AES engine (to expand the key).
       // Wait for init to complete.
-      // Note, not actually needed to wait. We can write R data during init.
       $display("* Initializing.");
       write_word(ADDR_CTRL, 32'h00000001);
       #(2 * CLK_PERIOD);
@@ -1216,7 +1212,7 @@ module tb_keywrap();
       $display("* Init done.");
 
       // Display contents in key expansion register 2 again.
-      $display("Contents of the key_mem[2] after init: 0x%016x",
+      $display("Contents in key_mem[2] after init: 0x%016x",
                dut.core.aes.keymem.key_mem[2]);
 
       // Check if key is loaded, according to the loaded flag.
@@ -1224,16 +1220,16 @@ module tb_keywrap();
       $display("Status register: 0b%032b", read_data);
 
       // Display the timeout counter a few times.
-      $display("Contents of timeout counter: 0x%04x",
+      $display("Status of timeout counter: 0x%04x",
                dut.core.key_timeout_ctr_reg);
       #(2 * CLK_PERIOD);
-      $display("Contents of timeout counter: 0x%04x",
+      $display("Status of timeout counter: 0x%04x",
                dut.core.key_timeout_ctr_reg);
       #(2 * CLK_PERIOD);
-      $display("Contents of timeout counter: 0x%04x",
+      $display("Status timeout counter: 0x%04x",
                dut.core.key_timeout_ctr_reg);
       #(2 * CLK_PERIOD);
-      $display("Contents of timeout counter: 0x%04x",
+      $display("Status of timeout counter: 0x%04x",
                dut.core.key_timeout_ctr_reg);
       #(2 * CLK_PERIOD);
 
@@ -1241,27 +1237,37 @@ module tb_keywrap();
       $display("Status register: 0x%032b", read_data);
 
       // Display contents in one of the key expansion registers
-      $display("Contents of the key_mem[2]: 0x%016x",
-               dut.core.aes.keymem.key_mem[2]);
-      // Display contents in one of the key expansion registers
-      $display("Contents of the key_mem[2]: 0x%016x",
-               dut.core.aes.keymem.key_mem[2]);
-      // Display contents in one of the key expansion registers
-      $display("Contents of the key_mem[2]: 0x%016x",
+      $display("Contents in key_mem[2]: 0x%016x",
                dut.core.aes.keymem.key_mem[2]);
 
-      #(40 * CLK_PERIOD);
-
       // Set the key timeout to 16 cycles.
       // Read status to perform ping.
+      $display("Setting the timeout to 0x10 cycles and checking status.");
       write_word(ADDR_TIMEOUT, 32'h00000010);
       read_word(ADDR_STATUS);
-      #(400 * CLK_PERIOD);
+      #(CLK_PERIOD);
+      read_word(ADDR_STATUS);
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+
+      $display("Waiting 0x40 cycles.");
+      #(64 * CLK_PERIOD);
 
 
       read_word(ADDR_STATUS);
       $display("Status register: 0x%032b", read_data);
+      $display("Status of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      // Display contents in key expansion register 2 again.
+      $display("Contents in key_mem[2] after init: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
 
+      if (dut.core.aes.keymem.key_mem[2] != 128'h62636363626363636263636362636363)
+        begin
+          error_ctr = error_ctr + 1;
+          $display("Error. Contents in key_mem[2]: 0x%016x, expected 0x62636363626363636263636362636363",
+                   dut.core.aes.keymem.key_mem[2]);
+        end
 
       $display("** TC test_zeroise1 END.\n");
     end
@@ -1503,8 +1509,8 @@ module tb_keywrap();
 //      test_big_wrap_256();
 
       test_zeroise1();
-      test_zeroise2();
-      test_zeroise3();
+//      test_zeroise2();
+//      test_zeroise3();
 
       display_test_results();