diff options
Diffstat (limited to 'src/rtl/keywrap_core.v')
-rw-r--r-- | src/rtl/keywrap_core.v | 123 |
1 files changed, 2 insertions, 121 deletions
diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v index 0354475..b3e17f6 100644 --- a/src/rtl/keywrap_core.v +++ b/src/rtl/keywrap_core.v @@ -4,7 +4,6 @@ // -------------- // Core that tries to implement AES KEY WRAP as specified in // RFC 3394 and extended with padding in RFC 5649. -// Experimental core at the moment. Does Not Work. // The maximum wrap object size is 64 kByte. // // @@ -51,12 +50,6 @@ module keywrap_core #(parameter MEM_BITS = 11) output wire ready, output wire valid, - output wire loaded, - - input wire [31 : 0] timeout_delay, - input wire ping, - input wire zeroise, - output wire timeout, input wire [(MEM_BITS - 2) : 0] rlen, @@ -89,9 +82,6 @@ module keywrap_core #(parameter MEM_BITS = 11) localparam CTRL_NEXT_WCHECK = 4'h8; localparam CTRL_NEXT_UCHECK = 4'h9; localparam CTRL_NEXT_FINALIZE = 4'ha; - localparam CTRL_ZERO_WAIT = 4'hb; - - localparam DEFAULT_TIMEOUT = 32'h0400_0000; //---------------------------------------------------------------- @@ -126,17 +116,6 @@ module keywrap_core #(parameter MEM_BITS = 11) reg iteration_ctr_set; reg iteration_ctr_rst; - reg [31 : 0] key_timeout_ctr_reg; - reg [31 : 0] key_timeout_ctr_new; - reg key_timeout_ctr_we; - reg key_timeout_ctr_set; - reg key_timeout_ctr_dec; - reg key_timeout; - - reg key_loaded_reg; - reg key_loaded_new; - reg key_loaded_we; - reg [3 : 0] keywrap_core_ctrl_reg; reg [3 : 0] keywrap_core_ctrl_new; reg keywrap_core_ctrl_we; @@ -149,13 +128,10 @@ module keywrap_core #(parameter MEM_BITS = 11) reg aes_next; wire aes_ready; wire aes_valid; - reg [255 : 0] aes_key; - reg aes_keylen; reg [127 : 0] aes_block; wire [127 : 0] aes_result; reg update_state; - reg zero_key; reg core_we; reg [(MEM_BITS - 2) : 0] core_addr; @@ -190,8 +166,8 @@ module keywrap_core #(parameter MEM_BITS = 11) .init(aes_init), .next(aes_next), - .key(aes_key), - .keylen(aes_keylen), + .key(key), + .keylen(keylen), .block(aes_block), @@ -207,8 +183,6 @@ module keywrap_core #(parameter MEM_BITS = 11) assign a_result = a_reg; assign ready = ready_reg; assign valid = valid_reg; - assign loaded = key_loaded_reg; - assign timeout = key_timeout; //---------------------------------------------------------------- @@ -221,10 +195,8 @@ module keywrap_core #(parameter MEM_BITS = 11) a_reg <= 64'h0; ready_reg <= 1'h1; valid_reg <= 1'h0; - key_loaded_reg <= 1'h0; block_ctr_reg <= {(MEM_BITS - 1){1'h0}}; iteration_ctr_reg <= 3'h0; - key_timeout_ctr_reg <= DEFAULT_TIMEOUT; keywrap_core_ctrl_reg <= CTRL_IDLE; end @@ -245,12 +217,6 @@ module keywrap_core #(parameter MEM_BITS = 11) if (iteration_ctr_we) iteration_ctr_reg <= iteration_ctr_new; - if (key_timeout_ctr_we) - key_timeout_ctr_reg <= key_timeout_ctr_new; - - if (key_loaded_we) - key_loaded_reg <= key_loaded_new; - if (keywrap_core_ctrl_we) keywrap_core_ctrl_reg <= keywrap_core_ctrl_new; end @@ -258,24 +224,6 @@ module keywrap_core #(parameter MEM_BITS = 11) //---------------------------------------------------------------- - // zeroise_mux - //---------------------------------------------------------------- - always @* - begin : zeroise_mux - if (zero_key) - begin - aes_key = 256'h0; - aes_keylen = 1'h1; - end - else - begin - aes_key = key; - aes_keylen = keylen; - end - end - - - //---------------------------------------------------------------- // keywrap_logic // // Main logic for the key wrap functionality. @@ -387,31 +335,6 @@ module keywrap_core #(parameter MEM_BITS = 11) //---------------------------------------------------------------- - // key_timeout_ctr - //---------------------------------------------------------------- - always @* - begin : key_timeout_ctr - key_timeout_ctr_new = 32'h0; - key_timeout_ctr_we = 1'h0; - key_timeout = 1'h0; - - if (key_timeout_ctr_reg == 32'h0) - key_timeout = 1'h1; - - if (key_timeout_ctr_set || ping) - begin - key_timeout_ctr_new = timeout_delay; - key_timeout_ctr_we = 1'h1; - end - else if (key_timeout_ctr_dec) - begin - key_timeout_ctr_new = key_timeout_ctr_reg - 1'h1; - key_timeout_ctr_we = 1'h1; - end - end - - - //---------------------------------------------------------------- // keywrap_core_ctrl //---------------------------------------------------------------- always @* @@ -432,11 +355,6 @@ module keywrap_core #(parameter MEM_BITS = 11) iteration_ctr_dec = 1'h0; iteration_ctr_set = 1'h0; iteration_ctr_rst = 1'h0; - key_timeout_ctr_set = 1'h0; - key_timeout_ctr_dec = 1'h0; - zero_key = 1'h0; - key_loaded_new = 1'h0; - key_loaded_we = 1'h0; keywrap_core_ctrl_new = CTRL_IDLE; keywrap_core_ctrl_we = 1'h0; @@ -444,25 +362,6 @@ module keywrap_core #(parameter MEM_BITS = 11) case (keywrap_core_ctrl_reg) CTRL_IDLE: begin - if (key_loaded_reg) - begin - if (key_timeout || zeroise) - begin - aes_init = 1'h1; - zero_key = 1'h1; - ready_new = 1'h0; - ready_we = 1'h1; - valid_new = 1'h0; - valid_we = 1'h1; - keywrap_core_ctrl_new = CTRL_ZERO_WAIT; - keywrap_core_ctrl_we = 1'h1; - end - else - begin - key_timeout_ctr_dec = 1'h1; - end - end - if (init) begin aes_init = 1'h1; @@ -496,9 +395,6 @@ module keywrap_core #(parameter MEM_BITS = 11) begin ready_new = 1'h1; ready_we = 1'h1; - key_loaded_new = 1'h1; - key_loaded_we = 1'h1; - key_timeout_ctr_set = 1'h1; keywrap_core_ctrl_new = CTRL_IDLE; keywrap_core_ctrl_we = 1'h1; end @@ -616,26 +512,11 @@ module keywrap_core #(parameter MEM_BITS = 11) ready_we = 1'h1; valid_new = 1'h1; valid_we = 1'h1; - key_timeout_ctr_set = 1'h1; keywrap_core_ctrl_new = CTRL_IDLE; keywrap_core_ctrl_we = 1'h1; end - CTRL_ZERO_WAIT: - begin - zero_key = 1'h1; - if (aes_ready) - begin - key_loaded_new = 1'h0; - key_loaded_we = 1'h1; - ready_new = 1'h1; - ready_we = 1'h1; - keywrap_core_ctrl_new = CTRL_IDLE; - keywrap_core_ctrl_we = 1'h1; - end - end - default: begin |