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-rw-r--r--src/rtl/keywrap.v43
-rw-r--r--src/tb/tb_keywrap.v24
-rwxr-xr-xtoolruns/Makefile5
3 files changed, 63 insertions, 9 deletions
diff --git a/src/rtl/keywrap.v b/src/rtl/keywrap.v
index f8fcbd7..b394c9c 100644
--- a/src/rtl/keywrap.v
+++ b/src/rtl/keywrap.v
@@ -53,6 +53,11 @@ module keywrap #(parameter ADDR_BITS = 13)
input wire clk,
input wire reset_n,
+ output wire mkm_spi_sclk,
+ output wire mkm_spi_cs_n,
+ input wire mkm_spi_do,
+ output wire mkm_spi_di,
+
input wire cs,
input wire we,
@@ -150,6 +155,12 @@ module keywrap #(parameter ADDR_BITS = 13)
wire [63 : 0] core_a_result;
wire [31 : 0] core_api_rd_data;
+ reg mem_cs;
+ reg mem_we;
+ reg [7 : 0] mem_address;
+ reg [31 : 0] mem_write_data;
+ wire [31 : 0] mem_read_data;
+
//----------------------------------------------------------------
// Concurrent connectivity for ports etc.
@@ -166,7 +177,7 @@ module keywrap #(parameter ADDR_BITS = 13)
//----------------------------------------------------------------
- // core instantiation.
+ // keywrap core instantiation.
//----------------------------------------------------------------
keywrap_core #(.MEM_BITS(MEM_BITS))
core(
@@ -194,6 +205,22 @@ module keywrap #(parameter ADDR_BITS = 13)
.api_rd_data(core_api_rd_data)
);
+ mkmif memory(
+ .clk(clk),
+ .reset_n(reset_n),
+
+ .spi_sclk(mkm_spi_sclk),
+ .spi_cs_n(mkm_spi_cs_n),
+ .spi_do(mkm_spi_do),
+ .spi_di(mkm_spi_di),
+
+ .cs(mem_cs),
+ .we(mem_we),
+ .address(mem_address),
+ .write_data(mem_write_data),
+ .read_data(mem_read_data)
+ );
+
//----------------------------------------------------------------
// reg_update
@@ -330,6 +357,20 @@ module keywrap #(parameter ADDR_BITS = 13)
end // else: !if(we)
end // if (cs)
end // block: api
+
+
+ //----------------------------------------------------------------
+ // mkmif_ctrl
+ // Logic needed to handle the integratrion of the mkmif
+ //----------------------------------------------------------------
+ always @*
+ begin : mkmif_ctrl
+ mem_cs = 1'h0;
+ mem_we = 1'h0;
+ mem_address = 8'h0;
+ mem_write_data = 32'h0;
+ end
+
endmodule // keywrap
//======================================================================
diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v
index 4d1c25c..1f1dabf 100644
--- a/src/tb/tb_keywrap.v
+++ b/src/tb/tb_keywrap.v
@@ -97,6 +97,10 @@ module tb_keywrap();
reg tb_clk;
reg tb_reset_n;
+ wire tb_mkm_spi_sclk;
+ wire tb_mkm_spi_cs_n;
+ reg tb_mkm_spi_do;
+ wire tb_mkm_spi_di;
reg tb_cs;
reg tb_we;
reg [(ADDR_BITS -1 ) : 0] tb_address;
@@ -111,6 +115,10 @@ module tb_keywrap();
keywrap dut(
.clk(tb_clk),
.reset_n(tb_reset_n),
+ .mkm_spi_sclk(tb_mkm_spi_sclk),
+ .mkm_spi_cs_n(tb_mkm_spi_cs_n),
+ .mkm_spi_do(tb_mkm_spi_do),
+ .mkm_spi_di(tb_mkm_spi_di),
.cs(tb_cs),
.we(tb_we),
.address(tb_address),
@@ -330,15 +338,17 @@ module tb_keywrap();
//----------------------------------------------------------------
task init_sim;
begin
- cycle_ctr = 0;
- error_ctr = 0;
- tc_ctr = 0;
+ cycle_ctr = 1'h0;
+ error_ctr = 1'h0;
+ tc_ctr = 1'h0;
- tb_clk = 0;
- tb_reset_n = 1;
+ tb_clk = 1'h0;
+ tb_reset_n = 1'h1;
- tb_cs = 0;
- tb_we = 0;
+ tb_mkm_spi_do = 1'h1;
+
+ tb_cs = 1'h0;
+ tb_we = 1'h0;
tb_address = 8'h0;
tb_write_data = 32'h0;
end
diff --git a/toolruns/Makefile b/toolruns/Makefile
index 6a37c41..1ca960b 100755
--- a/toolruns/Makefile
+++ b/toolruns/Makefile
@@ -37,6 +37,9 @@
#
#===================================================================
+MKMIF_PATH = ../../mkmif/src/rtl
+MKMIF_SRC = $(MKMIF_PATH)/mkmif.v $(MKMIF_PATH)/mkmif_core.v $(MKMIF_PATH)/mkmif_spi.v
+
AES_PATH = ../../../../core/cipher/aes_speed/src/rtl
AES_SRC = $(AES_PATH)/aes_core.v $(AES_PATH)/aes_decipher_block.v $(AES_PATH)/aes_encipher_block.v $(AES_PATH)/aes_inv_sbox.v $(AES_PATH)/aes_key_mem.v $(AES_PATH)/aes_sbox.v
@@ -46,7 +49,7 @@ TB_MEM_SRC = ../src/tb/tb_keywrap_mem.v
CORE_SRC = ../src/rtl/keywrap_core.v $(AES_SRC) $(MEM_SRC)
TB_CORE_SRC = ../src/tb/tb_keywrap_core.v
-TOP_SRC = ../src/rtl/keywrap.v $(CORE_SRC)
+TOP_SRC = ../src/rtl/keywrap.v $(CORE_SRC) $(MKMIF_SRC)
TB_TOP_SRC = ../src/tb/tb_keywrap.v
CC = iverilog