diff options
author | Paul Selkirk <paul@psgd.org> | 2020-04-28 12:06:29 -0400 |
---|---|---|
committer | Paul Selkirk <paul@psgd.org> | 2020-04-29 11:39:00 -0400 |
commit | edb6018262d33f016bef7f7f740f1c7fac8db7b5 (patch) | |
tree | cb2fc0cfd2baae4c97723b930b51d9a00257fe4f /src/rtl/keywrap_core.v | |
parent | 2aee357d677e720215f5a03cf071ee94980cf05d (diff) |
Wired up mkey_key to allow the user to specify which key to use (MKM or
user-provided key).
Wired up mkm_wr_status so we can actually write the status word to MKM.
Removed the reset initialization of mkmif_core, since that has its own
auto-initialization. I might want to remove init as an input to
keywrap_mkmif.
Fixed a FSM state-transition write-enable, so it would actually transition
states.
Changed a 3-bit counter to 4 bits, so it can actually count to 8.
And removed several bits of non-functional junk.
Diffstat (limited to 'src/rtl/keywrap_core.v')
-rw-r--r-- | src/rtl/keywrap_core.v | 23 |
1 files changed, 9 insertions, 14 deletions
diff --git a/src/rtl/keywrap_core.v b/src/rtl/keywrap_core.v index 3abe93c..644e0d0 100644 --- a/src/rtl/keywrap_core.v +++ b/src/rtl/keywrap_core.v @@ -8,8 +8,9 @@ // // // Author: Joachim Strombergson -// Copyright (c) 2018, NORDUnet A/S -// All rights reserved. +// Copyright (c) 2018, NORDUnet A/S All rights reserved. +// Copyright: 2020, The Commons Conservancy Cryptech Project +// SPDX-License-Identifier: BSD-3-Clause // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions are @@ -133,7 +134,6 @@ module keywrap_core #(parameter MEM_BITS = 11) reg [3 : 0] keywrap_core_ctrl_new; reg keywrap_core_ctrl_we; - //---------------------------------------------------------------- // Wires. //---------------------------------------------------------------- @@ -152,7 +152,6 @@ module keywrap_core #(parameter MEM_BITS = 11) reg [63 : 0] core_wr_data; wire [63 : 0] core_rd_data; - reg mkm_init; reg mkm_read; reg mkm_write; reg mkm_key_status; @@ -209,7 +208,7 @@ module keywrap_core #(parameter MEM_BITS = 11) .mkm_spi_do(mkm_spi_do), .mkm_spi_di(mkm_spi_di), - .init(mkm_init), + .init(0), .read(mkm_read), .write(mkm_write), .key_status(mkey_mstatus), @@ -230,7 +229,7 @@ module keywrap_core #(parameter MEM_BITS = 11) assign valid = valid_reg; assign mkey = mkm_rd_key; assign mstatus = mkm_rd_status; - + assign mkm_wr_status = status; //---------------------------------------------------------------- // reg_update @@ -242,7 +241,7 @@ module keywrap_core #(parameter MEM_BITS = 11) if (!reset_n) begin a_reg <= 64'h0; - ready_reg <= 1'h1; + ready_reg <= 1'h0; valid_reg <= 1'h0; block_ctr_reg <= {(MEM_BITS - 1){1'h0}}; iteration_ctr_reg <= 3'h0; @@ -388,9 +387,9 @@ module keywrap_core #(parameter MEM_BITS = 11) always @* begin if (mkey_key) - aes_key = mkm_rd_key; - else aes_key = key; + else + aes_key = mkm_rd_key; end @@ -407,7 +406,6 @@ module keywrap_core #(parameter MEM_BITS = 11) update_state = 1'h0; aes_init = 1'h0; aes_next = 1'h0; - mkm_init = 1'h0; mkm_read = 1'h0; mkm_write = 1'h0; block_ctr_dec = 1'h0; @@ -422,15 +420,13 @@ module keywrap_core #(parameter MEM_BITS = 11) keywrap_core_ctrl_new = CTRL_IDLE; keywrap_core_ctrl_we = 1'h0; - case (keywrap_core_ctrl_reg) CTRL_RESET: begin - mkm_init = 1'h1; ready_new = 1'h0; ready_we = 1'h1; keywrap_core_ctrl_new = CTRL_MKM_WAIT; - keywrap_core_ctrl_we = 1'h0; + keywrap_core_ctrl_we = 1'h1; end @@ -466,7 +462,6 @@ module keywrap_core #(parameter MEM_BITS = 11) mkm_read = 1'h1; ready_new = 1'h0; ready_we = 1'h1; - mkm_read = 1'h1; keywrap_core_ctrl_new = CTRL_MKM_WAIT; keywrap_core_ctrl_we = 1'h1; end |