core/rng/rosc_entropy - Digital entropy source based on on jitter between multiple, digital ring oscillators

Age	Commit message (Expand)	Author
2015-11-17	Harmonize status valid bit with other cores.	Paul Selkirk
2015-11-16	harmonize ctrl and status addresses with other cores	Paul Selkirk
2015-10-05	Changed warmup cycles to a cool million.	Joachim Strömbergson
2015-10-05	(1) Added warmup functionality to the rosc entropy provider. (2) Changed name...	Joachim Strömbergson
2015-04-28	Remove the delayed read for EIM (see core/platform/novena commit 2f58e8f).	Paul Selkirk
2015-04-13	Added a simple parameterized zero extension to squash warnings in ISE and Ver...	Joachim Strömbergson
2015-03-26	Adding a README for the rosc entropy source with a short description of what ...	Joachim Strömbergson
2015-03-26	Changed fromm hard coded oscillator adder width to localparam and updated ope...	Joachim Strömbergson
2015-03-25	register data for eim output	Paul Selkirk
2014-11-14	Added addresses and hard coded strings for name and version accessible from A...	Joachim Strömbergson
2014-11-07	Added Bernd Paysan as author.	Joachim Strömbergson
2014-10-23	Added Xilinx specific constraint attribute to preserve the ring oscillators. ...	Joachim Strömbergson
2014-10-02	Changed name of register to make it more obvious what it is.	Joachim Strömbergson
2014-09-26	Update of rosc entropy after synthesis of the trng.	Joachim Strömbergson
2014-09-24	Fixed synthesis warnings.	Joachim Strömbergson
2014-09-24	Adding an enable signal port for any consumers to know that the provider is a...	Joachim Strömbergson
2014-09-24	Updates to fix bugs found during synthesis. Adding more debug outputs in API....	Joachim Strömbergson
2014-09-18	Adding a new core for ring oscillator based entropy.	Joachim Strömbergson